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Some devices (such as a 16550 UART) may be accessed via either MMIO or port I/O. This is currently forced to be a compile-time decision. For example: we currently access a 16550 UART via port I/O on x86 and via MMIO on any other platform. PCI UARTs with MMIO BARs do exist but are not currently supported in an x86 build of iPXE. Some AWS EC2 systems (observed on a c6i.metal instance in eu-west-2) provide only a PCI MMIO UART, and it is therefore currently impossible to get serial output from iPXE on these instance types. Add ioread8(), ioread16(), etc accessors that will select between MMIO and port I/O at the point of use. For non-x86 platforms where we currently have no port I/O support, these simply become wrappers around the corresponding readb(), readw(), etc MMIO accessors. On x86, we use the fairly well-known trick of treating any 16-bit address (below 64kB) as a port I/O address. This trick works even in the i386 BIOS build of iPXE (where virtual addresses are offset from physical addresses by a runtime constant), since the first 64kB of the virtual address space will correspond to the iPXE binary itself (along with its uninitialised-data space), and so must be RAM rather than a valid MMIO address range. Signed-off-by: Michael Brown <mcb30@ipxe.org>
iPXE README File Quick start guide: cd src make For any more detailed instructions, see http://ipxe.org