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The 16550 design includes a programmable 16-bit clock divider for an arbitrary input clock, requiring knowledge of the input clock frequency in order to calculate the divider value for a given baud rate. The 16550 UARTs in an x86 PC will always have a 1.8432 MHz input clock. Non-x86 systems may have other input clock frequencies. Define the input clock frequency as a property of a 16550 UART, and read the value from the device tree "clock-frequency" property. Signed-off-by: Michael Brown <mcb30@ipxe.org>
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