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https://github.com/ipxe/ipxe
synced 2025-12-09 10:50:28 +03:00
[phantom] Change register space abstraction to match other drivers
Most other Phantom drivers define a register space in terms of a 64M virtual address space. While this doesn't map in any meaningful way to the actual addresses used on the latest cards, it makes maintenance easier if we do the same.
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@@ -228,21 +228,8 @@ struct phantom_nic {
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*/
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static unsigned long phantom_crb_access_128m ( struct phantom_nic *phantom,
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unsigned long reg ) {
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static const uint32_t reg_window[] = {
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[UNM_CRB_BLK_PCIE] = 0x0000000,
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[UNM_CRB_BLK_CAM] = 0x2000000,
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[UNM_CRB_BLK_ROMUSB] = 0x2000000,
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[UNM_CRB_BLK_TEST] = 0x0000000,
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};
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static const uint32_t reg_bases[] = {
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[UNM_CRB_BLK_PCIE] = 0x6100000,
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[UNM_CRB_BLK_CAM] = 0x6200000,
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[UNM_CRB_BLK_ROMUSB] = 0x7300000,
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[UNM_CRB_BLK_TEST] = 0x6200000,
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};
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unsigned int block = UNM_CRB_BLK ( reg );
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unsigned long offset = UNM_CRB_OFFSET ( reg );
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uint32_t window = reg_window[block];
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unsigned long offset = ( 0x6000000 + ( reg & 0x1ffffff ) );
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uint32_t window = ( reg & 0x2000000 );
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uint32_t verify_window;
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if ( phantom->crb_window != window ) {
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@@ -258,7 +245,7 @@ static unsigned long phantom_crb_access_128m ( struct phantom_nic *phantom,
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phantom->crb_window = window;
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}
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return ( reg_bases[block] + offset );
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return offset;
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}
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/**
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@@ -270,21 +257,8 @@ static unsigned long phantom_crb_access_128m ( struct phantom_nic *phantom,
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*/
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static unsigned long phantom_crb_access_32m ( struct phantom_nic *phantom,
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unsigned long reg ) {
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static const uint32_t reg_window[] = {
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[UNM_CRB_BLK_PCIE] = 0x0000000,
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[UNM_CRB_BLK_CAM] = 0x2000000,
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[UNM_CRB_BLK_ROMUSB] = 0x2000000,
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[UNM_CRB_BLK_TEST] = 0x0000000,
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};
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static const uint32_t reg_bases[] = {
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[UNM_CRB_BLK_PCIE] = 0x0100000,
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[UNM_CRB_BLK_CAM] = 0x0200000,
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[UNM_CRB_BLK_ROMUSB] = 0x1300000,
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[UNM_CRB_BLK_TEST] = 0x0200000,
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};
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unsigned int block = UNM_CRB_BLK ( reg );
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unsigned long offset = UNM_CRB_OFFSET ( reg );
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uint32_t window = reg_window[block];
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unsigned long offset = ( reg & 0x1ffffff );
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uint32_t window = ( reg & 0x2000000 );
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uint32_t verify_window;
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if ( phantom->crb_window != window ) {
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@@ -300,7 +274,7 @@ static unsigned long phantom_crb_access_32m ( struct phantom_nic *phantom,
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phantom->crb_window = window;
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}
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return ( reg_bases[block] + offset );
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return offset;
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}
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/**
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@@ -312,31 +286,49 @@ static unsigned long phantom_crb_access_32m ( struct phantom_nic *phantom,
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*/
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static unsigned long phantom_crb_access_2m ( struct phantom_nic *phantom,
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unsigned long reg ) {
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static const uint32_t reg_window_hi[] = {
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[UNM_CRB_BLK_PCIE] = 0x77300000,
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[UNM_CRB_BLK_CAM] = 0x41600000,
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[UNM_CRB_BLK_ROMUSB] = 0x42100000,
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[UNM_CRB_BLK_TEST] = 0x29500000,
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static const struct {
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uint8_t block;
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uint16_t window_hi;
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} reg_window_hi[] = {
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{ UNM_CRB_BLK_PCIE, 0x773 },
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{ UNM_CRB_BLK_CAM, 0x416 },
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{ UNM_CRB_BLK_ROMUSB, 0x421 },
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{ UNM_CRB_BLK_TEST, 0x295 },
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};
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unsigned int block = UNM_CRB_BLK ( reg );
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unsigned long offset = UNM_CRB_OFFSET ( reg );
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uint32_t window = ( reg_window_hi[block] | ( offset & 0x000f0000 ) );
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uint32_t window;
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uint32_t verify_window;
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unsigned int i;
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if ( phantom->crb_window != window ) {
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for ( i = 0 ; i < ( sizeof ( reg_window_hi ) /
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sizeof ( reg_window_hi[0] ) ) ; i++ ) {
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/* Write to the CRB window register */
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writel ( window, phantom->bar0 + UNM_2M_CRB_WINDOW );
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if ( reg_window_hi[i].block != block )
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continue;
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/* Ensure that the write has reached the card */
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verify_window = readl ( phantom->bar0 + UNM_2M_CRB_WINDOW );
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assert ( verify_window == window );
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window = ( ( reg_window_hi[i].window_hi << 20 ) |
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( offset & 0x000f0000 ) );
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/* Record new window */
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phantom->crb_window = window;
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if ( phantom->crb_window != window ) {
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/* Write to the CRB window register */
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writel ( window, phantom->bar0 + UNM_2M_CRB_WINDOW );
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/* Ensure that the write has reached the card */
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verify_window = readl ( phantom->bar0 +
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UNM_2M_CRB_WINDOW );
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assert ( verify_window == window );
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/* Record new window */
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phantom->crb_window = window;
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}
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return ( 0x1e0000 + ( offset & 0xffff ) );
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}
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return ( 0x1e0000 + ( offset & 0xffff ) );
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assert ( 0 );
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return 0;
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}
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/**
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@@ -76,14 +76,14 @@ typedef uint32_t nx_rcode_t;
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* address by the phantom_crb_access_xxx() methods.
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*/
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enum unm_reg_blocks {
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UNM_CRB_BLK_PCIE,
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UNM_CRB_BLK_CAM,
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UNM_CRB_BLK_ROMUSB,
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UNM_CRB_BLK_TEST,
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UNM_CRB_BLK_PCIE = 0x01,
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UNM_CRB_BLK_CAM = 0x22,
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UNM_CRB_BLK_ROMUSB = 0x33,
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UNM_CRB_BLK_TEST = 0x02,
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};
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#define UNM_CRB_BASE(blk) ( (blk) << 24 )
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#define UNM_CRB_BLK(reg) ( (reg) >> 24 )
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#define UNM_CRB_OFFSET(reg) ( (reg) & 0x00ffffff )
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#define UNM_CRB_BASE(blk) ( (blk) << 20 )
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#define UNM_CRB_BLK(reg) ( (reg) >> 20 )
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#define UNM_CRB_OFFSET(reg) ( (reg) & 0x000fffff )
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#define UNM_CRB_PCIE UNM_CRB_BASE ( UNM_CRB_BLK_PCIE )
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#define UNM_PCIE_SEM2_LOCK ( UNM_CRB_PCIE + 0x1c010 )
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