[dwuart] Read input clock frequency from the device tree

The 16550 design includes a programmable 16-bit clock divider for an
arbitrary input clock, requiring knowledge of the input clock
frequency in order to calculate the divider value for a given baud
rate.  The 16550 UARTs in an x86 PC will always have a 1.8432 MHz
input clock.  Non-x86 systems may have other input clock frequencies.

Define the input clock frequency as a property of a 16550 UART, and
read the value from the device tree "clock-frequency" property.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown
2025-06-23 22:40:04 +01:00
parent 0ed1dea7f4
commit 9ada09c919
4 changed files with 19 additions and 4 deletions
+1
View File
@@ -37,6 +37,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
#define ISA_UART( NAME, BASE ) \
static struct ns16550_uart ns16550_ ## NAME = { \
.base = ( ( void * ) (BASE) ), \
.clock = NS16550_CLK_DEFAULT, \
}; \
struct uart NAME = { \
.refcnt = REF_INIT ( ref_no_free ), \