[timer] Rewrite the 8254 Programmable Interval Timer support

The 8254 timer code (used to implement udelay()) has an unknown
provenance.  Rewrite this code to avoid potential licensing
uncertainty.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown
2015-02-17 16:24:02 +00:00
parent 320e786d3d
commit 08189df4e0
6 changed files with 153 additions and 107 deletions

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@@ -27,7 +27,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
#include <assert.h>
#include <ipxe/timer.h>
#include <ipxe/timer2.h>
#include <ipxe/pit8254.h>
/**
* Number of TSC ticks per microsecond
@@ -56,10 +56,10 @@ static void rdtsc_udelay ( unsigned long usecs ) {
elapsed = ( currticks() - start );
} while ( elapsed < ( usecs * rdtsc_ticks_per_usec ) );
} else {
/* Not yet calibrated; use timer2 and calibrate
/* Not yet calibrated; use 8254 PIT and calibrate
* based on result.
*/
timer2_udelay ( usecs );
pit8254_udelay ( usecs );
elapsed = ( currticks() - start );
rdtsc_ticks_per_usec = ( elapsed / usecs );
DBG ( "RDTSC timer calibrated: %ld ticks in %ld usecs "

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@@ -1,87 +0,0 @@
/*
* arch/i386/core/i386_timer.c
*
* Use the "System Timer 2" to implement the udelay callback in
* the BIOS timer driver. Also used to calibrate the clock rate
* in the RTDSC timer driver.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2, or (at
* your option) any later version.
*/
FILE_LICENCE ( GPL2_OR_LATER );
#include <stddef.h>
#include <ipxe/timer2.h>
#include <ipxe/io.h>
/* Timers tick over at this rate */
#define TIMER2_TICKS_PER_SEC 1193180U
/* Parallel Peripheral Controller Port B */
#define PPC_PORTB 0x61
/* Meaning of the port bits */
#define PPCB_T2OUT 0x20 /* Bit 5 */
#define PPCB_SPKR 0x02 /* Bit 1 */
#define PPCB_T2GATE 0x01 /* Bit 0 */
/* Ports for the 8254 timer chip */
#define TIMER2_PORT 0x42
#define TIMER_MODE_PORT 0x43
/* Meaning of the mode bits */
#define TIMER0_SEL 0x00
#define TIMER1_SEL 0x40
#define TIMER2_SEL 0x80
#define READBACK_SEL 0xC0
#define LATCH_COUNT 0x00
#define LOBYTE_ACCESS 0x10
#define HIBYTE_ACCESS 0x20
#define WORD_ACCESS 0x30
#define MODE0 0x00
#define MODE1 0x02
#define MODE2 0x04
#define MODE3 0x06
#define MODE4 0x08
#define MODE5 0x0A
#define BINARY_COUNT 0x00
#define BCD_COUNT 0x01
static void load_timer2 ( unsigned int ticks ) {
/*
* Now let's take care of PPC channel 2
*
* Set the Gate high, program PPC channel 2 for mode 0,
* (interrupt on terminal count mode), binary count,
* load 5 * LATCH count, (LSB and MSB) to begin countdown.
*
* Note some implementations have a bug where the high bits byte
* of channel 2 is ignored.
*/
/* Set up the timer gate, turn off the speaker */
/* Set the Gate high, disable speaker */
outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB);
/* binary, mode 0, LSB/MSB, Ch 2 */
outb(TIMER2_SEL|WORD_ACCESS|MODE0|BINARY_COUNT, TIMER_MODE_PORT);
/* LSB of ticks */
outb(ticks & 0xFF, TIMER2_PORT);
/* MSB of ticks */
outb(ticks >> 8, TIMER2_PORT);
}
static int timer2_running ( void ) {
return ((inb(PPC_PORTB) & PPCB_T2OUT) == 0);
}
void timer2_udelay ( unsigned long usecs ) {
load_timer2 ( ( usecs * TIMER2_TICKS_PER_SEC ) / ( 1000 * 1000 ) );
while (timer2_running()) {
/* Do nothing */
}
}

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@@ -15,7 +15,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
#define TIMER_PREFIX_pcbios __pcbios_
#endif
#include <ipxe/timer2.h>
#include <ipxe/pit8254.h>
/**
* Delay for a fixed number of microseconds
@@ -25,9 +25,9 @@ FILE_LICENCE ( GPL2_OR_LATER );
static inline __always_inline void
TIMER_INLINE ( pcbios, udelay ) ( unsigned long usecs ) {
/* BIOS timer is not high-resolution enough for udelay(), so
* we use timer2
* we use the 8254 Programmable Interval Timer.
*/
timer2_udelay ( usecs );
pit8254_udelay ( usecs );
}
/**

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@@ -1,14 +0,0 @@
#ifndef _IPXE_TIMER2_H
#define _IPXE_TIMER2_H
/** @file
*
* Timer chip control
*
*/
FILE_LICENCE ( GPL2_OR_LATER );
extern void timer2_udelay ( unsigned long usecs );
#endif /* _IPXE_TIMER2_H */