mirror of
https://github.com/ipxe/ipxe
synced 2025-12-07 01:40:28 +03:00
8406115834
Access to the gpxe.org and etherboot.org domains and associated resources has been revoked by the registrant of the domain. Work around this problem by renaming project from gPXE to iPXE, and updating URLs to match. Also update README, LOG and COPYRIGHTS to remove obsolete information. Signed-off-by: Michael Brown <mcb30@ipxe.org>
88 lines
2.3 KiB
C
88 lines
2.3 KiB
C
/*
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* arch/i386/core/i386_timer.c
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*
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* Use the "System Timer 2" to implement the udelay callback in
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* the BIOS timer driver. Also used to calibrate the clock rate
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* in the RTDSC timer driver.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2, or (at
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* your option) any later version.
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*/
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FILE_LICENCE ( GPL2_OR_LATER );
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#include <stddef.h>
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#include <ipxe/timer2.h>
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#include <ipxe/io.h>
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/* Timers tick over at this rate */
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#define TIMER2_TICKS_PER_SEC 1193180U
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/* Parallel Peripheral Controller Port B */
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#define PPC_PORTB 0x61
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/* Meaning of the port bits */
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#define PPCB_T2OUT 0x20 /* Bit 5 */
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#define PPCB_SPKR 0x02 /* Bit 1 */
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#define PPCB_T2GATE 0x01 /* Bit 0 */
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/* Ports for the 8254 timer chip */
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#define TIMER2_PORT 0x42
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#define TIMER_MODE_PORT 0x43
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/* Meaning of the mode bits */
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#define TIMER0_SEL 0x00
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#define TIMER1_SEL 0x40
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#define TIMER2_SEL 0x80
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#define READBACK_SEL 0xC0
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#define LATCH_COUNT 0x00
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#define LOBYTE_ACCESS 0x10
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#define HIBYTE_ACCESS 0x20
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#define WORD_ACCESS 0x30
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#define MODE0 0x00
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#define MODE1 0x02
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#define MODE2 0x04
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#define MODE3 0x06
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#define MODE4 0x08
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#define MODE5 0x0A
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#define BINARY_COUNT 0x00
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#define BCD_COUNT 0x01
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static void load_timer2 ( unsigned int ticks ) {
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/*
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* Now let's take care of PPC channel 2
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*
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* Set the Gate high, program PPC channel 2 for mode 0,
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* (interrupt on terminal count mode), binary count,
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* load 5 * LATCH count, (LSB and MSB) to begin countdown.
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*
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* Note some implementations have a bug where the high bits byte
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* of channel 2 is ignored.
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*/
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/* Set up the timer gate, turn off the speaker */
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/* Set the Gate high, disable speaker */
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outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB);
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/* binary, mode 0, LSB/MSB, Ch 2 */
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outb(TIMER2_SEL|WORD_ACCESS|MODE0|BINARY_COUNT, TIMER_MODE_PORT);
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/* LSB of ticks */
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outb(ticks & 0xFF, TIMER2_PORT);
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/* MSB of ticks */
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outb(ticks >> 8, TIMER2_PORT);
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}
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static int timer2_running ( void ) {
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return ((inb(PPC_PORTB) & PPCB_T2OUT) == 0);
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}
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void timer2_udelay ( unsigned long usecs ) {
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load_timer2 ( ( usecs * TIMER2_TICKS_PER_SEC ) / ( 1000 * 1000 ) );
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while (timer2_running()) {
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/* Do nothing */
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}
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}
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