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https://github.com/ipxe/ipxe
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1d04900262
Some VF data is not cleared with reset, so make sure to return all the settings to default before configuring the VF. This fixes an issue where network packets would fail to be received if the VF was previously used by the linux ixgbevf driver. Modified-by: Michael Brown <mcb30@ipxe.org> Signed-off-by: Michael Brown <mcb30@ipxe.org>
115 lines
3.8 KiB
C
115 lines
3.8 KiB
C
#ifndef _INTELXVF_H
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#define _INTELXVF_H
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/** @file
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*
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* Intel 10 Gigabit Ethernet virtual function network card driver
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include "intelvf.h"
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/** Control Register */
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#define INTELXVF_CTRL 0x0000UL
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#define INTELXVF_CTRL_RST 0x04000000UL /**< Function-level reset */
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/** Link Status Register */
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#define INTELXVF_LINKS 0x0010UL
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#define INTELXVF_LINKS_UP 0x40000000UL /**< Link up */
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/** Extended Interrupt Cause Read Register */
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#define INTELXVF_EICR 0x0100UL
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#define INTELXVF_EIRQ_RX0 0x00000001UL /**< RX queue 0 (via IVAR) */
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#define INTELXVF_EIRQ_TX0 0x00000002UL /**< TX queue 0 (via IVAR) */
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#define INTELXVF_EIRQ_MBOX 0x00000004UL /**< Mailbox (via IVARM) */
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/** Extended Interrupt Mask Set/Read Register */
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#define INTELXVF_EIMS 0x0108UL
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/** Extended Interrupt Mask Clear Register */
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#define INTELXVF_EIMC 0x010cUL
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/** Interrupt Vector Allocation Register */
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#define INTELXVF_IVAR 0x0120UL
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#define INTELXVF_IVAR_RX0(bit) ( (bit) << 0 ) /**< RX queue 0 allocation */
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#define INTELXVF_IVAR_RX0_DEFAULT INTELXVF_IVAR_RX0 ( 0x00 )
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#define INTELXVF_IVAR_RX0_MASK INTELXVF_IVAR_RX0 ( 0x01 )
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#define INTELXVF_IVAR_RX0_VALID 0x00000080UL /**< RX queue 0 valid */
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#define INTELXVF_IVAR_TX0(bit) ( (bit) << 8 ) /**< TX queue 0 allocation */
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#define INTELXVF_IVAR_TX0_DEFAULT INTELXVF_IVAR_TX0 ( 0x01 )
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#define INTELXVF_IVAR_TX0_MASK INTELXVF_IVAR_TX0 ( 0x01 )
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#define INTELXVF_IVAR_TX0_VALID 0x00008000UL /**< TX queue 0 valid */
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/** Interrupt Vector Allocation Miscellaneous Register */
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#define INTELXVF_IVARM 0x0140UL
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#define INTELXVF_IVARM_MBOX(bit) ( (bit) << 0 ) /**< Mailbox allocation */
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#define INTELXVF_IVARM_MBOX_DEFAULT INTELXVF_IVARM_MBOX ( 0x02 )
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#define INTELXVF_IVARM_MBOX_MASK INTELXVF_IVARM_MBOX ( 0x03 )
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#define INTELXVF_IVARM_MBOX_VALID 0x00000080UL /**< Mailbox valid */
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/** Mailbox Memory Register Base */
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#define INTELXVF_MBMEM 0x0200UL
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/** Mailbox Control Register */
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#define INTELXVF_MBCTRL 0x02fcUL
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/** Packet Split Receive Type */
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#define INTELXVF_PSRTYPE 0x0300UL
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/** Receive Descriptor register block */
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#define INTELXVF_RD(n) ( 0x1000UL + ( 0x40 * (n) ) )
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/** RX DCA Control Register */
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#define INTELXVF_DCA_RXCTRL 0x100cUL
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#define INTELXVF_DCA_RXCTRL_MUST_BE_ZERO 0x00001000UL /**< Must be zero */
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/** Split Receive Control Register */
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#define INTELXVF_SRRCTL 0x1014UL
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#define INTELXVF_SRRCTL_BSIZE(kb) ( (kb) << 0 ) /**< Receive buffer size */
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#define INTELXVF_SRRCTL_BSIZE_DEFAULT INTELXVF_SRRCTL_BSIZE ( 0x02 )
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#define INTELXVF_SRRCTL_BSIZE_MASK INTELXVF_SRRCTL_BSIZE ( 0x1f )
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#define INTELXVF_SRRCTL_BHDRSIZE(kb) ( (kb) << 8 ) /**< Header size */
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#define INTELXVF_SRRCTL_BHDRSIZE_DEFAULT INTELXVF_SRRCTL_BHDRSIZE ( 0x04 )
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#define INTELXVF_SRRCTL_BHDRSIZE_MASK INTELXVF_SRRCTL_BHDRSIZE ( 0x0f )
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#define INTELXVF_SRRCTL_DESCTYPE(typ) ( (typ) << 25 ) /**< Descriptor type */
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#define INTELXVF_SRRCTL_DESCTYPE_DEFAULT INTELXVF_SRRCTL_DESCTYPE ( 0x00 )
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#define INTELXVF_SRRCTL_DESCTYPE_MASK INTELXVF_SRRCTL_DESCTYPE ( 0x07 )
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#define INTELXVF_SRRCTL_DROP_EN 0x10000000UL
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/** Good Packets Received Count */
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#define INTELXVF_GPRC 0x101c
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/** Good Packets Received Count Low */
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#define INTELXVF_GORCL 0x1020
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/** Good Packets Received Count High */
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#define INTELXVF_GORCH 0x1024
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/* Multicast Packets Received Count */
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#define INTELXVF_MPRC 0x1034
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/** Transmit Descriptor register block */
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#define INTELXVF_TD(n) ( 0x2000UL + ( 0x40 * (n) ) )
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/** Good Packets Transmitted Count */
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#define INTELXVF_GPTC 0x201c
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/** Good Packets Transmitted Count Low */
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#define INTELXVF_GOTCL 0x2020
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/** Good Packets Transmitted Count High */
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#define INTELXVF_GOTCH 0x2024
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/** Negotiate API version mailbox message */
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#define INTELXVF_MSG_TYPE_VERSION 0x00000008UL
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/** API version 1.1 */
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#define INTELXVF_MSG_VERSION_1_1 0x00000002UL
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/** Number of queues */
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#define INTELXVF_NUM_RINGS 8
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#endif /* _INTELXVF_H */
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