mirror of
https://github.com/ipxe/ipxe
synced 2026-01-02 01:42:37 +03:00
8406115834
Access to the gpxe.org and etherboot.org domains and associated resources has been revoked by the registrant of the domain. Work around this problem by renaming project from gPXE to iPXE, and updating URLs to match. Also update README, LOG and COPYRIGHTS to remove obsolete information. Signed-off-by: Michael Brown <mcb30@ipxe.org>
123 lines
2.8 KiB
C
123 lines
2.8 KiB
C
/*
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* Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
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* Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
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*
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* Lightly modified for iPXE, July 2009, by Joshua Oreman <oremanj@rwcr.net>.
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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FILE_LICENCE ( MIT );
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/****************\
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GPIO Functions
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\****************/
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#include "ath5k.h"
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#include "reg.h"
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#include "base.h"
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/*
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* Set GPIO inputs
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*/
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int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio)
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{
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if (gpio >= AR5K_NUM_GPIO)
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return -EINVAL;
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ath5k_hw_reg_write(ah,
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(ath5k_hw_reg_read(ah, AR5K_GPIOCR) & ~AR5K_GPIOCR_OUT(gpio))
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| AR5K_GPIOCR_IN(gpio), AR5K_GPIOCR);
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return 0;
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}
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/*
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* Set GPIO outputs
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*/
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int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio)
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{
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if (gpio >= AR5K_NUM_GPIO)
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return -EINVAL;
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ath5k_hw_reg_write(ah,
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(ath5k_hw_reg_read(ah, AR5K_GPIOCR) & ~AR5K_GPIOCR_OUT(gpio))
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| AR5K_GPIOCR_OUT(gpio), AR5K_GPIOCR);
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return 0;
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}
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/*
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* Get GPIO state
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*/
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u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio)
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{
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if (gpio >= AR5K_NUM_GPIO)
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return 0xffffffff;
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/* GPIO input magic */
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return ((ath5k_hw_reg_read(ah, AR5K_GPIODI) & AR5K_GPIODI_M) >> gpio) &
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0x1;
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}
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/*
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* Set GPIO state
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*/
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int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val)
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{
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u32 data;
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if (gpio >= AR5K_NUM_GPIO)
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return -EINVAL;
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/* GPIO output magic */
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data = ath5k_hw_reg_read(ah, AR5K_GPIODO);
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data &= ~(1 << gpio);
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data |= (val & 1) << gpio;
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ath5k_hw_reg_write(ah, data, AR5K_GPIODO);
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return 0;
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}
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/*
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* Initialize the GPIO interrupt (RFKill switch)
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*/
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void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio,
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u32 interrupt_level)
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{
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u32 data;
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if (gpio >= AR5K_NUM_GPIO)
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return;
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/*
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* Set the GPIO interrupt
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*/
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data = (ath5k_hw_reg_read(ah, AR5K_GPIOCR) &
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~(AR5K_GPIOCR_INT_SEL(gpio) | AR5K_GPIOCR_INT_SELH |
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AR5K_GPIOCR_INT_ENA | AR5K_GPIOCR_OUT(gpio))) |
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(AR5K_GPIOCR_INT_SEL(gpio) | AR5K_GPIOCR_INT_ENA);
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ath5k_hw_reg_write(ah, interrupt_level ? data :
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(data | AR5K_GPIOCR_INT_SELH), AR5K_GPIOCR);
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ah->ah_imr |= AR5K_IMR_GPIO;
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/* Enable GPIO interrupts */
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AR5K_REG_ENABLE_BITS(ah, AR5K_PIMR, AR5K_IMR_GPIO);
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}
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