mirror of
https://github.com/ipxe/ipxe
synced 2025-12-12 23:15:10 +03:00
621c2886aa
As written, if the if the UNDI ISR call clobbers the upper halves of any of the GPRs (which by convention it is permitted to do, and by paranoia should be expected to do) then nothing in the interrupt handler will recover the state. Additionally, save/restore %fs and %gs out of sheer paranoia - it's a cheap enough operation, and may prevent problems due to poorly written UNDI stacks.
83 lines
1.5 KiB
ArmAsm
83 lines
1.5 KiB
ArmAsm
#define PXENV_UNDI_ISR 0x0014
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#define PXENV_UNDI_ISR_IN_START 1
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#define PXENV_UNDI_ISR_OUT_OURS 0
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#define PXENV_UNDI_ISR_OUT_NOT_OURS 1
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#define IRQ_PIC_CUTOFF 8
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#define ICR_EOI_NON_SPECIFIC 0x20
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#define PIC1_ICR 0x20
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#define PIC2_ICR 0xa0
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.text
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.arch i386
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.section ".text16", "ax", @progbits
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.section ".data16", "aw", @progbits
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.code16
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.section ".text16"
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.globl undiisr
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undiisr:
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/* Preserve registers */
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pushw %ds
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pushw %es
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pushw %fs
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pushw %gs
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pushal
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/* Set up our segment registers */
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movw %cs:rm_ds, %ax
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movw %ax, %ds
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/* Check that we have an UNDI entry point */
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cmpw $0, undinet_entry_point
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je chain
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/* Issue UNDI API call */
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movw %ax, %es
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movw $undinet_params, %di
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movw $PXENV_UNDI_ISR, %bx
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movw $PXENV_UNDI_ISR_IN_START, funcflag
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pushw %es
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pushw %di
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pushw %bx
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lcall *undinet_entry_point
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cli /* Just in case */
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addw $6, %sp
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cmpw $PXENV_UNDI_ISR_OUT_OURS, funcflag
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jne eoi
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trig: /* Record interrupt occurence */
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incb undiisr_trigger_count
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eoi: /* Send EOI */
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movb $ICR_EOI_NON_SPECIFIC, %al
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cmpb $IRQ_PIC_CUTOFF, undiisr_irq
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jb 1f
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outb %al, $PIC2_ICR
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1: outb %al, $PIC1_ICR
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jmp exit
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chain: /* Chain to next handler */
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pushfw
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lcall *undiisr_next_handler
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exit: /* Restore registers and return */
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popal
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popw %gs
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popw %fs
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popw %es
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popw %ds
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iret
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.section ".data16"
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undinet_params:
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status: .word 0
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funcflag: .word 0
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bufferlength: .word 0
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framelength: .word 0
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frameheaderlength: .word 0
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frame: .word 0, 0
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prottype: .byte 0
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pkttype: .byte 0
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