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[bios] Add bin-x86_64-pcbios build platform
Move most arch/i386 files to arch/x86, and adjust the contents of the Makefiles and the include/bits/*.h headers to reflect the new locations. This patch makes no substantive code changes, as can be seen using a rename-aware diff (e.g. "git show -M5"). This patch does not make the pcbios platform functional for x86_64; it merely allows it to compile without errors. Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown
516
src/arch/x86/prefix/mromprefix.S
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516
src/arch/x86/prefix/mromprefix.S
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@@ -0,0 +1,516 @@
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/*
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* Copyright (C) 2010 Michael Brown <mbrown@fensystems.co.uk>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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* You can also choose to distribute this program under the terms of
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* the Unmodified Binary Distribution Licence (as given in the file
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* COPYING.UBDL), provided that you have satisfied its requirements.
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
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#define PCIBIOS_READ_CONFIG_WORD 0xb109
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#define PCIBIOS_READ_CONFIG_DWORD 0xb10a
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#define PCIBIOS_WRITE_CONFIG_WORD 0xb10c
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#define PCIBIOS_WRITE_CONFIG_DWORD 0xb10d
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#define PCI_COMMAND 0x04
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#define PCI_COMMAND_MEM 0x02
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#define PCI_BAR_0 0x10
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#define PCI_BAR_5 0x24
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#define PCI_BAR_EXPROM 0x30
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#define PCIR_SIGNATURE ( 'P' + ( 'C' << 8 ) + ( 'I' << 16 ) + ( 'R' << 24 ) )
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#define ROMPREFIX_EXCLUDE_PAYLOAD 1
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#define ROMPREFIX_MORE_IMAGES 1
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#define _pcirom_start _mrom_start
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#include "pciromprefix.S"
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.text
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.arch i386
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.code16
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/* Obtain access to payload by exposing the expansion ROM BAR at the
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* address currently used by a suitably large memory BAR on the same
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* device. The memory BAR is temporarily disabled. Using a memory
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* BAR on the same device means that we don't have to worry about the
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* configuration of any intermediate PCI bridges.
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*
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* Parameters:
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* %ds:0000 : Prefix
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* %esi : Buffer for copy of image source (or zero if no buffer available)
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* %ecx : Expected offset within buffer of first payload block
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* Returns:
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* %esi : Valid image source address (buffered or unbuffered)
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* %ecx : Actual offset within buffer of first payload block
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* CF set on error
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*/
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.section ".text16.early", "awx", @progbits
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.globl open_payload
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open_payload:
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/* Preserve registers */
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pushl %eax
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pushw %bx
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pushl %edx
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pushl %edi
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pushw %bp
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pushw %es
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pushw %ds
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/* Retrieve bus:dev.fn from .prefix */
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movw init_pci_busdevfn, %bx
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/* Set up %ds for access to .text16.early */
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pushw %cs
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popw %ds
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/* Set up %es for access to flat address space */
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xorw %ax, %ax
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movw %ax, %es
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/* Store bus:dev.fn to .text16.early */
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movw %bx, payload_pci_busdevfn
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/* Get expansion ROM BAR current value */
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movw $PCI_BAR_EXPROM, %di
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call pci_read_bar
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movl %eax, rom_bar_orig_value
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/* Get expansion ROM BAR size */
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call pci_size_mem_bar_low
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movl %ecx, rom_bar_size
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/* Find a suitable memory BAR to use */
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movw $PCI_BAR_0, %di /* %di is PCI BAR register */
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xorw %bp, %bp /* %bp is increment */
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find_mem_bar:
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/* Move to next BAR */
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addw %bp, %di
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cmpw $PCI_BAR_5, %di
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jle 1f
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stc
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movl $0xbabababa, %esi /* Report "No suitable BAR" */
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movl rom_bar_size, %ecx
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jmp 99f
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1: movw $4, %bp
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/* Get BAR current value */
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call pci_read_bar
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/* Skip non-existent BARs */
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notl %eax
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testl %eax, %eax
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notl %eax
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jz find_mem_bar
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/* Skip I/O BARs */
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testb $0x01, %al
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jnz find_mem_bar
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/* Set increment to 8 for 64-bit BARs */
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testb $0x04, %al
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jz 1f
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movw $8, %bp
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1:
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/* Skip 64-bit BARs with high dword set; we couldn't use this
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* address for the (32-bit) expansion ROM BAR anyway
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*/
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testl %edx, %edx
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jnz find_mem_bar
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/* Get low dword of BAR size */
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call pci_size_mem_bar_low
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/* Skip BARs smaller than the expansion ROM BAR */
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cmpl %ecx, rom_bar_size
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ja find_mem_bar
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/* We have a memory BAR with a 32-bit address that is large
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* enough to use. Store BAR number and original value.
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*/
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movw %di, stolen_bar_register
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movl %eax, stolen_bar_orig_value
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/* Remove flags from BAR address */
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xorb %al, %al
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/* Write zero to our stolen BAR. This doesn't technically
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* disable it, but it's a pretty safe bet that the PCI bridge
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* won't pass through accesses to this region anyway. Note
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* that the high dword (if any) must already be zero.
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*/
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xorl %ecx, %ecx
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call pci_write_config_dword
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/* Enable expansion ROM BAR at stolen BAR's address */
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movl %eax, %ecx
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orb $0x1, %cl
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movw $PCI_BAR_EXPROM, %di
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call pci_write_config_dword
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/* Locate our ROM image */
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1: movl $0xaa55, %ecx /* 55aa signature */
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addr32 es cmpw %cx, (%eax)
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jne 2f
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movl $PCIR_SIGNATURE, %ecx /* PCIR signature */
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addr32 es movzwl 0x18(%eax), %edx
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addr32 es cmpl %ecx, (%eax,%edx)
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jne 2f
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addr32 es cmpl $_build_id, build_id(%eax) /* iPXE build ID */
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je 3f
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movl $0x80, %ecx /* Last image */
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addr32 es testb %cl, 0x15(%eax,%edx)
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jnz 2f
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addr32 es movzwl 0x10(%eax,%edx), %ecx /* PCIR image length */
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shll $9, %ecx
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addl %ecx, %eax
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jmp 1b
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2: /* Failure */
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stc
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movl %eax, %esi /* Report failure address */
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jmp 99f
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3:
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/* Copy payload to buffer, or set buffer address to BAR address */
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testl %esi, %esi
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jz 1f
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/* We have a buffer; copy payload to it. Since .mrom is
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* designed specifically for real hardware, we assume that
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* flat real mode is working properly. (In the unlikely event
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* that this code is run inside a hypervisor that doesn't
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* properly support flat real mode, it will die horribly.)
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*/
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pushl %esi
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movl %esi, %edi
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movl %eax, %esi
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addr32 es movzbl 2(%esi), %ecx
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shll $7, %ecx
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addr32 es movzwl mpciheader_image_length(%esi,%ecx,4), %edx
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shll $7, %edx
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addl %edx, %ecx
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addr32 es rep movsl
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popl %esi
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jmp 2f
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1: /* We have no buffer; set %esi to the BAR address */
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movl %eax, %esi
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2:
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/* Locate first payload block (after the dummy ROM header) */
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addr32 es movzbl 2(%esi), %ecx
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shll $9, %ecx
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addl $_pprefix_skip, %ecx
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clc
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/* Restore registers and return */
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99: popw %ds
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popw %es
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popw %bp
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popl %edi
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popl %edx
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popw %bx
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popl %eax
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lret
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.size open_payload, . - open_payload
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.section ".text16.early.data", "aw", @progbits
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payload_pci_busdevfn:
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.word 0
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.size payload_pci_busdevfn, . - payload_pci_busdevfn
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.section ".text16.early.data", "aw", @progbits
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rom_bar_orig_value:
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.long 0
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.size rom_bar_orig_value, . - rom_bar_orig_value
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.section ".text16.early.data", "aw", @progbits
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rom_bar_size:
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.long 0
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.size rom_bar_size, . - rom_bar_size
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.section ".text16.early.data", "aw", @progbits
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stolen_bar_register:
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.word 0
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.size stolen_bar_register, . - stolen_bar_register
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.section ".text16.early.data", "aw", @progbits
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stolen_bar_orig_value:
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.long 0
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.size stolen_bar_orig_value, . - stolen_bar_orig_value
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/* Restore original BAR values
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*
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* Parameters:
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* none
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* Returns:
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* none
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*/
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.section ".text16.early", "awx", @progbits
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.globl close_payload
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close_payload:
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/* Preserve registers */
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pushw %bx
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pushw %di
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pushl %ecx
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pushw %ds
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/* Set up %ds for access to .text16.early */
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pushw %cs
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popw %ds
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/* Retrieve stored bus:dev.fn */
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movw payload_pci_busdevfn, %bx
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/* Restore expansion ROM BAR original value */
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movw $PCI_BAR_EXPROM, %di
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movl rom_bar_orig_value, %ecx
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call pci_write_config_dword
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/* Restore stolen BAR original value */
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movw stolen_bar_register, %di
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movl stolen_bar_orig_value, %ecx
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call pci_write_config_dword
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/* Restore registers and return */
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popw %ds
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popl %ecx
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popw %di
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popw %bx
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lret
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.size close_payload, . - close_payload
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/* Get PCI BAR value
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*
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* Parameters:
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* %bx : PCI bus:dev.fn
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* %di : PCI BAR register number
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* Returns:
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* %edx:%eax : PCI BAR value
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*/
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.section ".text16.early", "awx", @progbits
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pci_read_bar:
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/* Preserve registers */
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pushl %ecx
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pushw %di
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/* Read low dword value */
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call pci_read_config_dword
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movl %ecx, %eax
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/* Read high dword value, if applicable */
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xorl %edx, %edx
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andb $0x07, %cl
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cmpb $0x04, %cl
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jne 1f
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addw $4, %di
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call pci_read_config_dword
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movl %ecx, %edx
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1:
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/* Restore registers and return */
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popw %di
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popl %ecx
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ret
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.size pci_read_bar, . - pci_read_bar
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/* Get low dword of PCI memory BAR size
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*
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* Parameters:
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* %bx : PCI bus:dev.fn
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* %di : PCI BAR register number
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* %eax : Low dword of current PCI BAR value
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* Returns:
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* %ecx : PCI BAR size
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*/
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.section ".text16.early", "awx", @progbits
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pci_size_mem_bar_low:
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/* Preserve registers */
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pushw %dx
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/* Disable memory accesses */
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xorw %dx, %dx
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call pci_set_mem_access
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/* Write all ones to BAR */
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xorl %ecx, %ecx
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decl %ecx
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call pci_write_config_dword
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/* Read back BAR */
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call pci_read_config_dword
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/* Calculate size */
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notl %ecx
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orb $0x0f, %cl
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incl %ecx
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/* Restore original value */
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pushl %ecx
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movl %eax, %ecx
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call pci_write_config_dword
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popl %ecx
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/* Enable memory accesses */
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movw $PCI_COMMAND_MEM, %dx
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call pci_set_mem_access
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/* Restore registers and return */
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popw %dx
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ret
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.size pci_size_mem_bar_low, . - pci_size_mem_bar_low
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/* Read PCI config dword
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*
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* Parameters:
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* %bx : PCI bus:dev.fn
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* %di : PCI register number
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* Returns:
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* %ecx : Dword value
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*/
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.section ".text16.early", "awx", @progbits
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pci_read_config_dword:
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/* Preserve registers */
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pushl %eax
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pushl %ebx
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pushl %edx
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/* Issue INT 0x1a,b10a */
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movw $PCIBIOS_READ_CONFIG_DWORD, %ax
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int $0x1a
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/* Restore registers and return */
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popl %edx
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popl %ebx
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popl %eax
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ret
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.size pci_read_config_dword, . - pci_read_config_dword
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/* Write PCI config dword
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*
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* Parameters:
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* %bx : PCI bus:dev.fn
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* %di : PCI register number
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* %ecx : PCI BAR value
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* Returns:
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* none
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*/
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.section ".text16.early", "awx", @progbits
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pci_write_config_dword:
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/* Preserve registers */
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pushal
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/* Issue INT 0x1a,b10d */
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movw $PCIBIOS_WRITE_CONFIG_DWORD, %ax
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int $0x1a
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/* Restore registers and return */
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popal
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ret
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.size pci_write_config_dword, . - pci_write_config_dword
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/* Enable/disable memory access response in PCI command word
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*
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* Parameters:
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* %bx : PCI bus:dev.fn
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* %dx : PCI_COMMAND_MEM, or zero
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* Returns:
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* none
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*/
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.section ".text16.early", "awx", @progbits
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pci_set_mem_access:
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/* Preserve registers */
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pushal
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/* Read current value of command register */
|
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pushw %bx
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||||
pushw %dx
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movw $PCI_COMMAND, %di
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movw $PCIBIOS_READ_CONFIG_WORD, %ax
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int $0x1a
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popw %dx
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popw %bx
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/* Set memory access enable as appropriate */
|
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andw $~PCI_COMMAND_MEM, %cx
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orw %dx, %cx
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/* Write new value of command register */
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movw $PCIBIOS_WRITE_CONFIG_WORD, %ax
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int $0x1a
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/* Restore registers and return */
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popal
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ret
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.size pci_set_mem_access, . - pci_set_mem_access
|
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/* Payload prefix
|
||||
*
|
||||
* We include a dummy ROM header to cover the "hidden" portion of the
|
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* overall ROM image.
|
||||
*/
|
||||
.globl _payload_align
|
||||
.equ _payload_align, 512
|
||||
.section ".pprefix", "ax", @progbits
|
||||
.org 0x00
|
||||
mromheader:
|
||||
.word 0xaa55 /* BIOS extension signature */
|
||||
.byte 0x01 /* Dummy size (BIOS bug workaround) */
|
||||
.org 0x18
|
||||
.word mpciheader
|
||||
.org 0x1a
|
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.word 0
|
||||
.size mromheader, . - mromheader
|
||||
|
||||
mpciheader:
|
||||
.ascii "PCIR" /* Signature */
|
||||
.word pci_vendor_id /* Vendor identification */
|
||||
.word pci_device_id /* Device identification */
|
||||
.word 0x0000 /* Device list pointer */
|
||||
.word mpciheader_len /* PCI data structure length */
|
||||
.byte 0x03 /* PCI data structure revision */
|
||||
.byte 0x02, 0x00, 0x00 /* Class code */
|
||||
mpciheader_image_length:
|
||||
.word 0 /* Image length */
|
||||
.word 0x0001 /* Revision level */
|
||||
.byte 0xff /* Code type */
|
||||
.byte 0x80 /* Last image indicator */
|
||||
mpciheader_runtime_length:
|
||||
.word 0 /* Maximum run-time image length */
|
||||
.word 0x0000 /* Configuration utility code header */
|
||||
.word 0x0000 /* DMTF CLP entry point */
|
||||
.equ mpciheader_len, . - mpciheader
|
||||
.size mpciheader, . - mpciheader
|
||||
|
||||
.section ".zinfo.fixup", "a", @progbits /* Compressor fixups */
|
||||
.ascii "APPW"
|
||||
.long mpciheader_image_length
|
||||
.long 512
|
||||
.long 0
|
||||
.ascii "APPW"
|
||||
.long mpciheader_runtime_length
|
||||
.long 512
|
||||
.long 0
|
||||
.previous
|
||||
|
||||
/* Fix up additional image source size
|
||||
*
|
||||
*/
|
||||
.section ".zinfo.fixup", "a", @progbits /* Compressor fixups */
|
||||
.ascii "ADPW"
|
||||
.long extra_size
|
||||
.long 512
|
||||
.long 0
|
||||
.previous
|
||||
Reference in New Issue
Block a user