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[pci] Rewrite unrelicensable portions of pci.h

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Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown
2015-03-03 00:08:41 +00:00
parent 06c8a27b74
commit e399fc0d21
11 changed files with 108 additions and 305 deletions
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16
src/drivers/bus/pci.c
View File

@@ -62,8 +62,8 @@ static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
uint32_t high;
pci_read_config_dword ( pci, reg, &low );
if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) )
== (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){
if ( ( low & (PCI_BASE_ADDRESS_SPACE_IO|PCI_BASE_ADDRESS_MEM_TYPE_MASK))
== PCI_BASE_ADDRESS_MEM_TYPE_64 ) {
pci_read_config_dword ( pci, reg + 4, &high );
if ( high ) {
if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
@@ -97,10 +97,10 @@ unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
unsigned long bar;
bar = pci_bar ( pci, reg );
if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){
return ( bar & PCI_BASE_ADDRESS_MEM_MASK );
if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
return ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
} else {
return ( bar & PCI_BASE_ADDRESS_IO_MASK );
return ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
}
}
@@ -126,11 +126,11 @@ static void pci_read_bases ( struct pci_device *pci ) {
if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
if ( ! pci->ioaddr )
pci->ioaddr =
( bar & PCI_BASE_ADDRESS_IO_MASK );
( bar & ~PCI_BASE_ADDRESS_IO_MASK );
} else {
if ( ! pci->membase )
pci->membase =
( bar & PCI_BASE_ADDRESS_MEM_MASK );
( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
/* Skip next BAR if 64-bit */
if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
reg += 4;
@@ -185,7 +185,7 @@ int pci_read_config ( struct pci_device *pci ) {
pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
pci->busdevfn = busdevfn;
if ( ! ( hdrtype & 0x80 ) )
if ( ! ( hdrtype & PCI_HEADER_TYPE_MULTI ) )
return -ENODEV;
}

10
src/drivers/bus/pciextra.c
View File

@@ -26,7 +26,7 @@ int pci_find_capability ( struct pci_device *pci, int cap ) {
return 0;
pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
switch ( hdr_type & 0x7F ) {
switch ( hdr_type & PCI_HEADER_TYPE_MASK ) {
case PCI_HEADER_TYPE_NORMAL:
case PCI_HEADER_TYPE_BRIDGE:
default:
@@ -38,13 +38,13 @@ int pci_find_capability ( struct pci_device *pci, int cap ) {
}
while ( ttl-- && pos >= 0x40 ) {
pos &= ~3;
pci_read_config_byte ( pci, pos + PCI_CAP_LIST_ID, &id );
pci_read_config_byte ( pci, pos + PCI_CAP_ID, &id );
DBG ( "PCI Capability: %d\n", id );
if ( id == 0xff )
break;
if ( id == cap )
return pos;
pci_read_config_byte ( pci, pos + PCI_CAP_LIST_NEXT, &pos );
pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &pos );
}
return 0;
}
@@ -76,9 +76,9 @@ unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg ) {
/* Restore the original command register. This reenables decoding. */
pci_write_config_word ( pci, PCI_COMMAND, cmd );
if ( start & PCI_BASE_ADDRESS_SPACE_IO ) {
size &= PCI_BASE_ADDRESS_IO_MASK;
size &= ~PCI_BASE_ADDRESS_IO_MASK;
} else {
size &= PCI_BASE_ADDRESS_MEM_MASK;
size &= ~PCI_BASE_ADDRESS_MEM_MASK;
}
/* Find the lowest bit set */
size = size & ~( size - 1 );

2
src/drivers/net/atl1e.c
View File

@@ -224,7 +224,7 @@ static int atl1e_sw_init(struct atl1e_adapter *adapter)
adapter->link_duplex = FULL_DUPLEX;
/* PCI config space info */
pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
pci_read_config_byte(pdev, PCI_REVISION, &rev_id);
phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
/* nic type */

2
src/drivers/net/dmfe.c
View File

@@ -462,7 +462,7 @@ static int dmfe_probe ( struct nic *nic, struct pci_device *pci ) {
pci->id->name, pci->vendor, pci->device);
/* Read Chip revision */
pci_read_config_dword(pci, PCI_REVISION_ID, &dev_rev);
pci_read_config_dword(pci, PCI_REVISION, &dev_rev);
dprintf(("Revision %lX\n", dev_rev));
/* point to private storage */

2
src/drivers/net/etherfabric.c
View File

@@ -3176,7 +3176,7 @@ falcon_probe_nic_variant ( struct efab_nic *efab, struct pci_device *pci )
uint8_t revision;
/* PCI revision */
pci_read_config_byte ( pci, PCI_CLASS_REVISION, &revision );
pci_read_config_byte ( pci, PCI_REVISION, &revision );
efab->pci_revision = revision;
/* Asic vs FPGA */

6
src/drivers/net/forcedeth.c
View File

@@ -1749,10 +1749,8 @@ forcedeth_map_regs ( struct forcedeth_private *priv )
for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
pci_read_config_dword ( priv->pci_dev, reg, &bar );
if ( ( ( bar & PCI_BASE_ADDRESS_SPACE ) ==
PCI_BASE_ADDRESS_SPACE_MEMORY ) &&
( pci_bar_size ( priv->pci_dev, reg ) >=
register_size ) ) {
if ( ( ! ( bar & PCI_BASE_ADDRESS_SPACE_IO ) ) &&
( pci_bar_size ( priv->pci_dev, reg ) >= register_size ) ){
addr = pci_bar_start ( priv->pci_dev, reg );
break;
}

2
src/drivers/net/igbvf/igbvf_main.c
View File

@@ -461,7 +461,7 @@ static int __devinit igbvf_sw_init ( struct igbvf_adapter *adapter )
hw->vendor_id = pdev->vendor;
hw->device_id = pdev->device;
pci_read_config_byte ( pdev, PCI_REVISION_ID, &hw->revision_id );
pci_read_config_byte ( pdev, PCI_REVISION, &hw->revision_id );
pci_read_config_word ( pdev, PCI_COMMAND, &hw->bus.pci_cmd_word );

4
src/drivers/net/prism2_plx.c
View File

@@ -54,10 +54,10 @@ static int prism2_find_plx ( hfa384x_t *hw, struct pci_device *p )
/* Obtain all memory and IO base addresses */
pci_read_config_dword( p, PLX_LOCAL_CONFIG_REGISTER_BASE, &plx_lcr);
plx_lcr &= PCI_BASE_ADDRESS_IO_MASK;
plx_lcr &= ~PCI_BASE_ADDRESS_IO_MASK;
pci_read_config_dword( p, PRISM2_PLX_ATTR_MEM_BASE, &attr_mem);
pci_read_config_dword( p, PRISM2_PLX_IO_BASE, &iobase);
iobase &= PCI_BASE_ADDRESS_IO_MASK;
iobase &= ~PCI_BASE_ADDRESS_IO_MASK;
/* Fill out hw structure */
hw->iobase = iobase;

2
src/drivers/net/sundance.c
View File

@@ -601,7 +601,7 @@ static int sundance_probe ( struct nic *nic, struct pci_device *pci ) {
sdc->nic_name = pci->id->name;
sdc->mtu = mtu;
pci_read_config_byte(pci, PCI_REVISION_ID, &sdc->pci_rev_id);
pci_read_config_byte(pci, PCI_REVISION, &sdc->pci_rev_id);
DBG ( "Device revision id: %hx\n", sdc->pci_rev_id );

2
src/drivers/net/vxge/vxge_main.c
View File

@@ -509,7 +509,7 @@ vxge_probe(struct pci_device *pdev)
vxge_debug(VXGE_INFO, "vxge_probe for device " PCI_FMT "\n",
PCI_ARGS(pdev));
pci_read_config_byte(pdev, PCI_REVISION_ID, &revision);
pci_read_config_byte(pdev, PCI_REVISION, &revision);
titan1 = is_titan1(pdev->device, revision);
mmio_start = pci_bar_start(pdev, PCI_BASE_ADDRESS_0);