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[pci] Add support for the Enhanced Configuration Access Mechanism (ECAM)
The ACPI MCFG table describes a direct mapping of PCI configuration space into MMIO space. This mapping allows access to extended configuration space (up to 4096 bytes) and also provides for the existence of multiple host bridges. Add support for the ECAM mechanism described by the ACPI MCFG table, as a selectable PCI I/O API alongside the existing PCI BIOS and Type 1 mechanisms. Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown
@@ -0,0 +1,55 @@
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#ifndef _IPXE_ECAM_H
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#define _IPXE_ECAM_H
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/** @file
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*
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* PCI I/O API for Enhanced Configuration Access Mechanism (ECAM)
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <ipxe/acpi.h>
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#include <ipxe/pci.h>
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/** Enhanced Configuration Access Mechanism per-device size */
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#define ECAM_SIZE 4096
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/** Enhanced Configuration Access Mechanism table signature */
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#define ECAM_SIGNATURE ACPI_SIGNATURE ( 'M', 'C', 'F', 'G' )
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/** An Enhanced Configuration Access Mechanism allocation */
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struct ecam_allocation {
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/** Base address */
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uint64_t base;
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/** PCI segment number */
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uint16_t segment;
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/** Start PCI bus number */
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uint8_t start;
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/** End PCI bus number */
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uint8_t end;
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/** Reserved */
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uint8_t reserved[4];
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} __attribute__ (( packed ));
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/** An Enhanced Configuration Access Mechanism table */
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struct ecam_table {
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/** ACPI header */
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struct acpi_header acpi;
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/** Reserved */
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uint8_t reserved[8];
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/** Allocation structures */
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struct ecam_allocation alloc[0];
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} __attribute__ (( packed ));
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/** A mapped Enhanced Configuration Access Mechanism allocation */
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struct ecam_mapping {
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/** Allocation */
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struct ecam_allocation alloc;
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/** PCI bus:dev.fn address range */
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struct pci_range range;
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/** MMIO base address */
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void *regs;
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};
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#endif /* _IPXE_ECAM_H */
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@@ -0,0 +1,139 @@
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#ifndef _IPXE_ECAM_IO_H
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#define _IPXE_ECAM_IO_H
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/** @file
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*
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* PCI I/O API for Enhanced Configuration Access Mechanism (ECAM)
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <stdint.h>
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#ifdef PCIAPI_ECAM
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#define PCIAPI_PREFIX_ecam
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#else
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#define PCIAPI_PREFIX_ecam __ecam_
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#endif
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struct pci_device;
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/** Construct ECAM location */
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#define ECAM_LOC( where, len ) ( ( (len) << 16 ) | where )
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/** Extract offset from ECAM location */
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#define ECAM_WHERE( location ) ( (location) & 0xffff )
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/** Extract length from ECAM location */
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#define ECAM_LEN( location ) ( (location) >> 16 )
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extern int ecam_read ( struct pci_device *pci, unsigned int location,
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void *value );
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extern int ecam_write ( struct pci_device *pci, unsigned int location,
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unsigned long value );
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/**
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* Read byte from PCI configuration space via ECAM
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*
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* @v pci PCI device
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* @v where Location within PCI configuration space
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* @v value Value read
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* @ret rc Return status code
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*/
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static inline __always_inline int
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PCIAPI_INLINE ( ecam, pci_read_config_byte ) ( struct pci_device *pci,
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unsigned int where,
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uint8_t *value ) {
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return ecam_read ( pci, ECAM_LOC ( where, sizeof ( *value ) ), value );
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}
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/**
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* Read word from PCI configuration space via ECAM
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*
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* @v pci PCI device
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* @v where Location within PCI configuration space
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* @v value Value read
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* @ret rc Return status code
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*/
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static inline __always_inline int
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PCIAPI_INLINE ( ecam, pci_read_config_word ) ( struct pci_device *pci,
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unsigned int where,
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uint16_t *value ) {
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return ecam_read ( pci, ECAM_LOC ( where, sizeof ( *value ) ), value );
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}
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/**
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* Read dword from PCI configuration space via ECAM
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*
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* @v pci PCI device
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* @v where Location within PCI configuration space
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* @v value Value read
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* @ret rc Return status code
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*/
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static inline __always_inline int
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PCIAPI_INLINE ( ecam, pci_read_config_dword ) ( struct pci_device *pci,
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unsigned int where,
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uint32_t *value ) {
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return ecam_read ( pci, ECAM_LOC ( where, sizeof ( *value ) ), value );
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}
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/**
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* Write byte to PCI configuration space via ECAM
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*
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* @v pci PCI device
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* @v where Location within PCI configuration space
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* @v value Value to be written
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* @ret rc Return status code
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*/
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static inline __always_inline int
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PCIAPI_INLINE ( ecam, pci_write_config_byte ) ( struct pci_device *pci,
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unsigned int where,
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uint8_t value ) {
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return ecam_write ( pci, ECAM_LOC ( where, sizeof ( value ) ), value );
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}
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/**
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* Write word to PCI configuration space via ECAM
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*
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* @v pci PCI device
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* @v where Location within PCI configuration space
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* @v value Value to be written
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* @ret rc Return status code
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*/
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static inline __always_inline int
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PCIAPI_INLINE ( ecam, pci_write_config_word ) ( struct pci_device *pci,
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unsigned int where,
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uint16_t value ) {
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return ecam_write ( pci, ECAM_LOC ( where, sizeof ( value ) ), value );
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}
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/**
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* Write dword to PCI configuration space via ECAM
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*
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* @v pci PCI device
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* @v where Location within PCI configuration space
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* @v value Value to be written
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* @ret rc Return status code
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*/
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static inline __always_inline int
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PCIAPI_INLINE ( ecam, pci_write_config_dword ) ( struct pci_device *pci,
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unsigned int where,
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uint32_t value ) {
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return ecam_write ( pci, ECAM_LOC ( where, sizeof ( value ) ), value );
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}
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/**
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* Map PCI bus address as an I/O address
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*
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* @v bus_addr PCI bus address
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* @v len Length of region
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* @ret io_addr I/O address, or NULL on error
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*/
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static inline __always_inline void *
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PCIAPI_INLINE ( ecam, pci_ioremap ) ( struct pci_device *pci __unused,
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unsigned long bus_addr, size_t len ) {
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return ioremap ( bus_addr, len );
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}
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#endif /* _IPXE_ECAM_IO_H */
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@@ -216,6 +216,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#define ERRFILE_slirp ( ERRFILE_DRIVER | 0x00d00000 )
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#define ERRFILE_rdc ( ERRFILE_DRIVER | 0x00d10000 )
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#define ERRFILE_ice ( ERRFILE_DRIVER | 0x00d20000 )
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#define ERRFILE_ecam ( ERRFILE_DRIVER | 0x00d30000 )
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#define ERRFILE_aoe ( ERRFILE_NET | 0x00000000 )
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#define ERRFILE_arp ( ERRFILE_NET | 0x00010000 )
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@@ -58,6 +58,7 @@ struct pci_range {
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PROVIDE_SINGLE_API_INLINE ( PCIAPI_PREFIX_ ## _subsys, _api_func )
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/* Include all architecture-independent I/O API headers */
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#include <ipxe/ecam_io.h>
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#include <ipxe/efi/efi_pci_api.h>
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#include <ipxe/linux/linux_pci.h>
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