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https://github.com/ipxe/ipxe
synced 2025-12-31 15:25:23 +03:00
[i386] Change [u]int32_t to [unsigned] int, rather than [unsigned] long
This brings us in to line with Linux definitions, and also simplifies adding x86_64 support since both platforms have 2-byte shorts, 4-byte ints and 8-byte long longs.
This commit is contained in:
@@ -258,8 +258,8 @@ e1000_configure_tx ( struct e1000_adapter *adapter )
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E1000_WRITE_REG ( hw, TDBAL, virt_to_bus ( adapter->tx_base ) );
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E1000_WRITE_REG ( hw, TDLEN, adapter->tx_ring_size );
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DBG ( "TDBAL: %#08lx\n", E1000_READ_REG ( hw, TDBAL ) );
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DBG ( "TDLEN: %ld\n", E1000_READ_REG ( hw, TDLEN ) );
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DBG ( "TDBAL: %#08x\n", E1000_READ_REG ( hw, TDBAL ) );
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DBG ( "TDLEN: %d\n", E1000_READ_REG ( hw, TDLEN ) );
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/* Setup the HW Tx Head and Tail descriptor pointers */
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E1000_WRITE_REG ( hw, TDH, 0 );
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@@ -385,9 +385,9 @@ e1000_configure_rx ( struct e1000_adapter *adapter )
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E1000_WRITE_REG ( hw, RCTL, rctl );
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E1000_WRITE_FLUSH ( hw );
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DBG ( "RDBAL: %#08lx\n", E1000_READ_REG ( hw, RDBAL ) );
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DBG ( "RDLEN: %ld\n", E1000_READ_REG ( hw, RDLEN ) );
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DBG ( "RCTL: %#08lx\n", E1000_READ_REG ( hw, RCTL ) );
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DBG ( "RDBAL: %#08x\n", E1000_READ_REG ( hw, RDBAL ) );
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DBG ( "RDLEN: %d\n", E1000_READ_REG ( hw, RDLEN ) );
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DBG ( "RCTL: %#08x\n", E1000_READ_REG ( hw, RCTL ) );
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}
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/**
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@@ -577,7 +577,7 @@ e1000_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
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E1000_TXD_CMD_IFCS | iob_len ( iobuf );
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tx_curr_desc->upper.data = 0;
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DBG ( "TX fill: %ld tx_curr: %ld addr: %#08lx len: %zd\n", adapter->tx_fill_ctr,
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DBG ( "TX fill: %d tx_curr: %d addr: %#08lx len: %zd\n", adapter->tx_fill_ctr,
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tx_curr, virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
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/* Point to next free descriptor */
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@@ -620,7 +620,7 @@ e1000_poll ( struct net_device *netdev )
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if ( ! icr )
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return;
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DBG ( "e1000_poll: intr_status = %#08lx\n", icr );
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DBG ( "e1000_poll: intr_status = %#08x\n", icr );
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/* Check status of transmitted packets
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*/
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@@ -635,17 +635,17 @@ e1000_poll ( struct net_device *netdev )
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if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
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break;
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DBG ( "Sent packet. tx_head: %ld tx_tail: %ld tx_status: %#08lx\n",
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DBG ( "Sent packet. tx_head: %d tx_tail: %d tx_status: %#08x\n",
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adapter->tx_head, adapter->tx_tail, tx_status );
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if ( tx_status & ( E1000_TXD_STAT_EC | E1000_TXD_STAT_LC |
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E1000_TXD_STAT_TU ) ) {
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netdev_tx_complete_err ( netdev, adapter->tx_iobuf[i], -EINVAL );
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DBG ( "Error transmitting packet, tx_status: %#08lx\n",
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DBG ( "Error transmitting packet, tx_status: %#08x\n",
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tx_status );
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} else {
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netdev_tx_complete ( netdev, adapter->tx_iobuf[i] );
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DBG ( "Success transmitting packet, tx_status: %#08lx\n",
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DBG ( "Success transmitting packet, tx_status: %#08x\n",
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tx_status );
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}
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@@ -667,16 +667,16 @@ e1000_poll ( struct net_device *netdev )
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( i * sizeof ( *adapter->rx_base ) );
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rx_status = rx_curr_desc->status;
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DBG2 ( "Before DD Check RX_status: %#08lx\n", rx_status );
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DBG2 ( "Before DD Check RX_status: %#08x\n", rx_status );
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if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
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break;
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DBG ( "RCTL = %#08lx\n", E1000_READ_REG ( &adapter->hw, RCTL ) );
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DBG ( "RCTL = %#08x\n", E1000_READ_REG ( &adapter->hw, RCTL ) );
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rx_len = rx_curr_desc->length;
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DBG ( "Received packet, rx_curr: %ld rx_status: %#08lx rx_len: %ld\n",
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DBG ( "Received packet, rx_curr: %d rx_status: %#08x rx_len: %d\n",
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i, rx_status, rx_len );
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rx_err = rx_curr_desc->errors;
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@@ -685,7 +685,7 @@ e1000_poll ( struct net_device *netdev )
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netdev_rx_err ( netdev, NULL, -EINVAL );
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DBG ( "e1000_poll: Corrupted packet received!"
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" rx_err: %#08lx\n", rx_err );
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" rx_err: %#08x\n", rx_err );
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} else {
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/* If unable allocate space for this packet,
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@@ -962,7 +962,7 @@ e1000_open ( struct net_device *netdev )
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e1000_configure_rx ( adapter );
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DBG ( "RXDCTL: %#08lx\n", E1000_READ_REG ( &adapter->hw, RXDCTL ) );
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DBG ( "RXDCTL: %#08x\n", E1000_READ_REG ( &adapter->hw, RXDCTL ) );
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return 0;
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@@ -1429,7 +1429,7 @@ e1000_copper_link_preconfig(struct e1000_hw *hw)
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DEBUGOUT("Error, did not detect valid phy.\n");
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return ret_val;
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}
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DEBUGOUT1("Phy ID = %#08lx \n", hw->phy_id);
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DEBUGOUT1("Phy ID = %#08x \n", hw->phy_id);
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/* Set PHY to class A mode (if necessary) */
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ret_val = e1000_set_phy_mode(hw);
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@@ -3551,7 +3551,7 @@ e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr,
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DEBUGFUNC("e1000_read_phy_reg_ex");
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if (reg_addr > MAX_PHY_REG_ADDRESS) {
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DEBUGOUT1("PHY Address %ld is out of range\n", reg_addr);
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DEBUGOUT1("PHY Address %d is out of range\n", reg_addr);
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return -E1000_ERR_PARAM;
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}
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@@ -3689,7 +3689,7 @@ e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr,
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DEBUGFUNC("e1000_write_phy_reg_ex");
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if (reg_addr > MAX_PHY_REG_ADDRESS) {
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DEBUGOUT1("PHY Address %ld is out of range\n", reg_addr);
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DEBUGOUT1("PHY Address %d is out of range\n", reg_addr);
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return -E1000_ERR_PARAM;
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}
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@@ -4141,10 +4141,10 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
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phy_init_status = e1000_set_phy_type(hw);
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if ((match) && (phy_init_status == E1000_SUCCESS)) {
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DEBUGOUT1("PHY ID %#08lx detected\n", hw->phy_id);
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DEBUGOUT1("PHY ID %#08x detected\n", hw->phy_id);
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return E1000_SUCCESS;
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}
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DEBUGOUT1("Invalid PHY ID %#08lx\n", hw->phy_id);
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DEBUGOUT1("Invalid PHY ID %#08x\n", hw->phy_id);
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return -E1000_ERR_PHY;
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}
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@@ -8795,13 +8795,13 @@ e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte)
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int32_t error = E1000_SUCCESS;
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int32_t program_retries = 0;
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DEBUGOUT2("Byte := %2.2X Offset := %ld\n", byte, index);
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DEBUGOUT2("Byte := %2.2X Offset := %d\n", byte, index);
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error = e1000_write_ich8_byte(hw, index, byte);
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if (error != E1000_SUCCESS) {
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for (program_retries = 0; program_retries < 100; program_retries++) {
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DEBUGOUT2("Retrying \t Byte := %2.2X Offset := %ld\n", byte, index);
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DEBUGOUT2("Retrying \t Byte := %2.2X Offset := %d\n", byte, index);
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error = e1000_write_ich8_byte(hw, index, byte);
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udelay(100);
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if (error == E1000_SUCCESS)
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