mirror of
https://github.com/ipxe/ipxe
synced 2026-01-11 07:58:34 +03:00
[intelxl] Add driver for Intel 40 Gigabit Ethernet NIC virtual functions
Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown
@@ -20,9 +20,9 @@ struct intelxl_nic;
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/** Alignment
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*
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* No data structure requires greater than 128 byte alignment.
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* No data structure requires greater than 256 byte alignment.
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*/
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#define INTELXL_ALIGN 128
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#define INTELXL_ALIGN 256
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/******************************************************************************
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*
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@@ -310,6 +310,166 @@ struct intelxl_admin_link_params {
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/** Admin queue Send Message to VF command */
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#define INTELXL_ADMIN_SEND_TO_VF 0x0802
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/** Admin Queue VF Reset opcode */
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#define INTELXL_ADMIN_VF_RESET 0x00000002
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/** Admin Queue VF Get Resources opcode */
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#define INTELXL_ADMIN_VF_GET_RESOURCES 0x00000003
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/** Admin Queue VF Get Resources data buffer */
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struct intelxl_admin_vf_get_resources_buffer {
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/** Reserved */
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uint8_t reserved_a[20];
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/** VSI switching element ID */
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uint16_t vsi;
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/** Reserved */
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uint8_t reserved_b[8];
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/** MAC address */
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uint8_t mac[ETH_ALEN];
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} __attribute__ (( packed ));
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/** Admin Queue VF Status Change Event opcode */
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#define INTELXL_ADMIN_VF_STATUS 0x00000011
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/** Link status change event type */
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#define INTELXL_ADMIN_VF_STATUS_LINK 0x00000001
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/** Link status change event data */
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struct intelxl_admin_vf_status_link {
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/** Link speed */
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uint32_t speed;
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/** Link status */
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uint8_t status;
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/** Reserved */
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uint8_t reserved[3];
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} __attribute__ (( packed ));
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/** Admin Queue VF Status Change Event data buffer */
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struct intelxl_admin_vf_status_buffer {
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/** Event type */
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uint32_t event;
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/** Event data */
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union {
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/** Link change event data */
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struct intelxl_admin_vf_status_link link;
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} data;
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/** Reserved */
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uint8_t reserved[4];
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} __attribute__ (( packed ));
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/** Admin Queue VF Configure Queues opcode */
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#define INTELXL_ADMIN_VF_CONFIGURE 0x00000006
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/** Admin Queue VF Configure Queues data buffer */
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struct intelxl_admin_vf_configure_buffer {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Number of queue pairs */
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uint16_t count;
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/** Reserved */
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uint8_t reserved_a[4];
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/** Transmit queue */
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struct {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Queue ID */
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uint16_t id;
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/** Queue count */
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uint16_t count;
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/** Reserved */
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uint8_t reserved_a[2];
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/** Base address */
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uint64_t base;
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/** Reserved */
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uint8_t reserved_b[8];
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} __attribute__ (( packed )) tx;
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/** Receive queue */
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struct {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Queue ID */
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uint16_t id;
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/** Queue count */
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uint32_t count;
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/** Reserved */
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uint8_t reserved_a[4];
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/** Data buffer length */
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uint32_t len;
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/** Maximum frame size */
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uint32_t mfs;
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/** Reserved */
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uint8_t reserved_b[4];
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/** Base address */
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uint64_t base;
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/** Reserved */
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uint8_t reserved_c[8];
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} __attribute__ (( packed )) rx;
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/** Reserved
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*
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* This field exists only due to a bug in the PF driver's
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* message validation logic, which causes it to miscalculate
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* the expected message length.
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*/
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uint8_t reserved_b[64];
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} __attribute__ (( packed ));
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/** Admin Queue VF IRQ Map opcode */
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#define INTELXL_ADMIN_VF_IRQ_MAP 0x00000007
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/** Admin Queue VF IRQ Map data buffer */
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struct intelxl_admin_vf_irq_map_buffer {
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/** Number of interrupt vectors */
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uint16_t count;
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/** VSI switching element ID */
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uint16_t vsi;
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/** Interrupt vector ID */
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uint16_t vec;
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/** Receive queue bitmap */
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uint16_t rxmap;
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/** Transmit queue bitmap */
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uint16_t txmap;
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/** Receive interrupt throttling index */
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uint16_t rxitr;
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/** Transmit interrupt throttling index */
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uint16_t txitr;
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/** Reserved
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*
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* This field exists only due to a bug in the PF driver's
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* message validation logic, which causes it to miscalculate
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* the expected message length.
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*/
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uint8_t reserved[12];
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} __attribute__ (( packed ));
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/** Admin Queue VF Enable Queues opcode */
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#define INTELXL_ADMIN_VF_ENABLE 0x00000008
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/** Admin Queue VF Disable Queues opcode */
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#define INTELXL_ADMIN_VF_DISABLE 0x00000009
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/** Admin Queue VF Enable/Disable Queues data buffer */
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struct intelxl_admin_vf_queues_buffer {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Reserved */
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uint8_t reserved[2];
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/** Receive queue bitmask */
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uint32_t rx;
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/** Transmit queue bitmask */
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uint32_t tx;
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} __attribute__ (( packed ));
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/** Admin Queue VF Configure Promiscuous Mode opcode */
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#define INTELXL_ADMIN_VF_PROMISC 0x0000000e
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/** Admin Queue VF Configure Promiscuous Mode data buffer */
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struct intelxl_admin_vf_promisc_buffer {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Flags */
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uint16_t flags;
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} __attribute__ (( packed ));
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/** Admin queue command parameters */
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union intelxl_admin_params {
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/** Additional data buffer command parameters */
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@@ -342,6 +502,18 @@ union intelxl_admin_buffer {
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struct intelxl_admin_switch_buffer sw;
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/** Get VSI Parameters data buffer */
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struct intelxl_admin_vsi_buffer vsi;
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/** VF Get Resources data buffer */
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struct intelxl_admin_vf_get_resources_buffer res;
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/** VF Status Change Event data buffer */
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struct intelxl_admin_vf_status_buffer stat;
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/** VF Configure Queues data buffer */
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struct intelxl_admin_vf_configure_buffer cfg;
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/** VF Enable/Disable Queues data buffer */
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struct intelxl_admin_vf_queues_buffer queues;
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/** VF Configure Promiscuous Mode data buffer */
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struct intelxl_admin_vf_promisc_buffer promisc;
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/*** VF IRQ Map data buffer */
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struct intelxl_admin_vf_irq_map_buffer irq;
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/** Alignment padding */
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uint8_t pad[INTELXL_ALIGN];
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} __attribute__ (( packed ));
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@@ -867,12 +1039,21 @@ struct intelxl_nic {
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struct pci_msix msix;
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/** MSI-X dummy interrupt target */
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uint32_t msg;
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/** PCI Express capability offset */
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unsigned int exp;
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/** Admin command queue */
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struct intelxl_admin command;
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/** Admin event queue */
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struct intelxl_admin event;
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/** Current VF opcode */
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unsigned int vopcode;
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/** Current VF return value */
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int vret;
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/** Current VF event data buffer */
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union intelxl_admin_buffer vbuf;
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/** Transmit descriptor ring */
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struct intelxl_ring tx;
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/** Receive descriptor ring */
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