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[intelxl] Always issue "clear PXE mode" admin queue command
Remove knowledge of the GLLAN_RCTL_0 register (which changes location between the XL810 and E810 register maps), and instead unconditionally issue the "clear PXE mode" command with the EEXIST error silenced. Signed-off-by: Michael Brown <mcb30@ipxe.org>
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@@ -544,20 +544,12 @@ static int intelxl_admin_shutdown ( struct intelxl_nic *intelxl ) {
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static int intelxl_admin_clear_pxe ( struct intelxl_nic *intelxl ) {
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static int intelxl_admin_clear_pxe ( struct intelxl_nic *intelxl ) {
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struct intelxl_admin_descriptor *cmd;
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struct intelxl_admin_descriptor *cmd;
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struct intelxl_admin_clear_pxe_params *pxe;
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struct intelxl_admin_clear_pxe_params *pxe;
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uint32_t gllan_rctl_0;
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int rc;
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int rc;
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/* Do nothing if device is already out of PXE mode */
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gllan_rctl_0 = readl ( intelxl->regs + INTELXL_GLLAN_RCTL_0 );
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if ( ! ( gllan_rctl_0 & INTELXL_GLLAN_RCTL_0_PXE_MODE ) ) {
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DBGC2 ( intelxl, "INTELXL %p already in non-PXE mode\n",
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intelxl );
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return 0;
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}
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/* Populate descriptor */
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/* Populate descriptor */
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cmd = intelxl_admin_command_descriptor ( intelxl );
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cmd = intelxl_admin_command_descriptor ( intelxl );
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cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_CLEAR_PXE );
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cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_CLEAR_PXE );
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cmd->ret = cpu_to_le16 ( INTELXL_ADMIN_EEXIST );
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pxe = &cmd->params.pxe;
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pxe = &cmd->params.pxe;
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pxe->magic = INTELXL_ADMIN_CLEAR_PXE_MAGIC;
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pxe->magic = INTELXL_ADMIN_CLEAR_PXE_MAGIC;
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@@ -565,6 +557,13 @@ static int intelxl_admin_clear_pxe ( struct intelxl_nic *intelxl ) {
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if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
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if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
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return rc;
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return rc;
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/* Check for expected errors */
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if ( cmd->ret == cpu_to_le16 ( INTELXL_ADMIN_EEXIST ) ) {
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DBGC ( intelxl, "INTELXL %p already in non-PXE mode\n",
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intelxl );
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return 0;
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}
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return 0;
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return 0;
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}
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}
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@@ -377,6 +377,9 @@ struct intelxl_admin_descriptor {
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/** Admin descriptor uses data buffer */
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/** Admin descriptor uses data buffer */
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#define INTELXL_ADMIN_FL_BUF 0x1000
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#define INTELXL_ADMIN_FL_BUF 0x1000
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/** Error: attempt to create something that already exists */
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#define INTELXL_ADMIN_EEXIST 13
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/** Admin queue */
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/** Admin queue */
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struct intelxl_admin {
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struct intelxl_admin {
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/** Descriptors */
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/** Descriptors */
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@@ -577,10 +580,6 @@ struct intelxl_context_rx {
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/** Queue Tail Pointer Register (offset) */
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/** Queue Tail Pointer Register (offset) */
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#define INTELXL_QXX_TAIL 0x8000
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#define INTELXL_QXX_TAIL 0x8000
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/** Global RLAN Control 0 register */
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#define INTELXL_GLLAN_RCTL_0 0x12a500
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#define INTELXL_GLLAN_RCTL_0_PXE_MODE 0x00000001UL /**< PXE mode */
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/** Transmit data descriptor */
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/** Transmit data descriptor */
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struct intelxl_tx_data_descriptor {
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struct intelxl_tx_data_descriptor {
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/** Buffer address */
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/** Buffer address */
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