mirror of
https://github.com/ipxe/ipxe
synced 2026-02-14 02:31:26 +03:00
[xen] Update to current Xen headers
Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown
@@ -1,26 +1,9 @@
|
||||
/* SPDX-License-Identifier: MIT */
|
||||
/******************************************************************************
|
||||
* xen-x86_32.h
|
||||
*
|
||||
* Guest OS interface to x86 32-bit Xen.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to
|
||||
* deal in the Software without restriction, including without limitation the
|
||||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Copyright (c) 2004-2007, K A Fraser
|
||||
*/
|
||||
|
||||
@@ -60,34 +43,31 @@ FILE_LICENCE ( MIT );
|
||||
#define __HYPERVISOR_VIRT_START_PAE 0xF5800000
|
||||
#define __MACH2PHYS_VIRT_START_PAE 0xF5800000
|
||||
#define __MACH2PHYS_VIRT_END_PAE 0xF6800000
|
||||
#define HYPERVISOR_VIRT_START_PAE \
|
||||
mk_unsigned_long(__HYPERVISOR_VIRT_START_PAE)
|
||||
#define MACH2PHYS_VIRT_START_PAE \
|
||||
mk_unsigned_long(__MACH2PHYS_VIRT_START_PAE)
|
||||
#define MACH2PHYS_VIRT_END_PAE \
|
||||
mk_unsigned_long(__MACH2PHYS_VIRT_END_PAE)
|
||||
#define HYPERVISOR_VIRT_START_PAE xen_mk_ulong(__HYPERVISOR_VIRT_START_PAE)
|
||||
#define MACH2PHYS_VIRT_START_PAE xen_mk_ulong(__MACH2PHYS_VIRT_START_PAE)
|
||||
#define MACH2PHYS_VIRT_END_PAE xen_mk_ulong(__MACH2PHYS_VIRT_END_PAE)
|
||||
|
||||
/* Non-PAE bounds are obsolete. */
|
||||
#define __HYPERVISOR_VIRT_START_NONPAE 0xFC000000
|
||||
#define __MACH2PHYS_VIRT_START_NONPAE 0xFC000000
|
||||
#define __MACH2PHYS_VIRT_END_NONPAE 0xFC400000
|
||||
#define HYPERVISOR_VIRT_START_NONPAE \
|
||||
mk_unsigned_long(__HYPERVISOR_VIRT_START_NONPAE)
|
||||
xen_mk_ulong(__HYPERVISOR_VIRT_START_NONPAE)
|
||||
#define MACH2PHYS_VIRT_START_NONPAE \
|
||||
mk_unsigned_long(__MACH2PHYS_VIRT_START_NONPAE)
|
||||
xen_mk_ulong(__MACH2PHYS_VIRT_START_NONPAE)
|
||||
#define MACH2PHYS_VIRT_END_NONPAE \
|
||||
mk_unsigned_long(__MACH2PHYS_VIRT_END_NONPAE)
|
||||
xen_mk_ulong(__MACH2PHYS_VIRT_END_NONPAE)
|
||||
|
||||
#define __HYPERVISOR_VIRT_START __HYPERVISOR_VIRT_START_PAE
|
||||
#define __MACH2PHYS_VIRT_START __MACH2PHYS_VIRT_START_PAE
|
||||
#define __MACH2PHYS_VIRT_END __MACH2PHYS_VIRT_END_PAE
|
||||
|
||||
#ifndef HYPERVISOR_VIRT_START
|
||||
#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
|
||||
#define HYPERVISOR_VIRT_START xen_mk_ulong(__HYPERVISOR_VIRT_START)
|
||||
#endif
|
||||
|
||||
#define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START)
|
||||
#define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END)
|
||||
#define MACH2PHYS_VIRT_START xen_mk_ulong(__MACH2PHYS_VIRT_START)
|
||||
#define MACH2PHYS_VIRT_END xen_mk_ulong(__MACH2PHYS_VIRT_END)
|
||||
#define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>2)
|
||||
#ifndef machine_to_phys_mapping
|
||||
#define machine_to_phys_mapping ((unsigned long *)MACH2PHYS_VIRT_START)
|
||||
@@ -106,6 +86,7 @@ FILE_LICENCE ( MIT );
|
||||
do { if ( sizeof(hnd) == 8 ) *(uint64_t *)&(hnd) = 0; \
|
||||
(hnd).p = val; \
|
||||
} while ( 0 )
|
||||
#define int64_aligned_t int64_t __attribute__((aligned(8)))
|
||||
#define uint64_aligned_t uint64_t __attribute__((aligned(8)))
|
||||
#define __XEN_GUEST_HANDLE_64(name) __guest_handle_64_ ## name
|
||||
#define XEN_GUEST_HANDLE_64(name) __XEN_GUEST_HANDLE_64(name)
|
||||
@@ -113,22 +94,44 @@ FILE_LICENCE ( MIT );
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#if defined(XEN_GENERATING_COMPAT_HEADERS)
|
||||
/* nothing */
|
||||
#elif defined(__XEN__) || defined(__XEN_TOOLS__)
|
||||
/* Anonymous unions include all permissible names (e.g., al/ah/ax/eax). */
|
||||
#define __DECL_REG_LO8(which) union { \
|
||||
uint32_t e ## which ## x; \
|
||||
uint16_t which ## x; \
|
||||
struct { \
|
||||
uint8_t which ## l; \
|
||||
uint8_t which ## h; \
|
||||
}; \
|
||||
}
|
||||
#define __DECL_REG_LO16(name) union { \
|
||||
uint32_t e ## name, _e ## name; \
|
||||
uint16_t name; \
|
||||
}
|
||||
#else
|
||||
/* Other sources must always use the proper 32-bit name (e.g., eax). */
|
||||
#define __DECL_REG_LO8(which) uint32_t e ## which ## x
|
||||
#define __DECL_REG_LO16(name) uint32_t e ## name
|
||||
#endif
|
||||
|
||||
struct cpu_user_regs {
|
||||
uint32_t ebx;
|
||||
uint32_t ecx;
|
||||
uint32_t edx;
|
||||
uint32_t esi;
|
||||
uint32_t edi;
|
||||
uint32_t ebp;
|
||||
uint32_t eax;
|
||||
__DECL_REG_LO8(b);
|
||||
__DECL_REG_LO8(c);
|
||||
__DECL_REG_LO8(d);
|
||||
__DECL_REG_LO16(si);
|
||||
__DECL_REG_LO16(di);
|
||||
__DECL_REG_LO16(bp);
|
||||
__DECL_REG_LO8(a);
|
||||
uint16_t error_code; /* private */
|
||||
uint16_t entry_vector; /* private */
|
||||
uint32_t eip;
|
||||
__DECL_REG_LO16(ip);
|
||||
uint16_t cs;
|
||||
uint8_t saved_upcall_mask;
|
||||
uint8_t _pad0;
|
||||
uint32_t eflags; /* eflags.IF == !saved_upcall_mask */
|
||||
uint32_t esp;
|
||||
__DECL_REG_LO16(flags); /* eflags.IF == !saved_upcall_mask */
|
||||
__DECL_REG_LO16(sp);
|
||||
uint16_t ss, _pad1;
|
||||
uint16_t es, _pad2;
|
||||
uint16_t ds, _pad3;
|
||||
@@ -138,6 +141,9 @@ struct cpu_user_regs {
|
||||
typedef struct cpu_user_regs cpu_user_regs_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(cpu_user_regs_t);
|
||||
|
||||
#undef __DECL_REG_LO8
|
||||
#undef __DECL_REG_LO16
|
||||
|
||||
/*
|
||||
* Page-directory addresses above 4GB do not fit into architectural %cr3.
|
||||
* When accessing %cr3, or equivalent field in vcpu_guest_context, guests
|
||||
|
||||
@@ -1,26 +1,9 @@
|
||||
/* SPDX-License-Identifier: MIT */
|
||||
/******************************************************************************
|
||||
* xen-x86_64.h
|
||||
*
|
||||
* Guest OS interface to x86 64-bit Xen.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to
|
||||
* deal in the Software without restriction, including without limitation the
|
||||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Copyright (c) 2004-2006, K A Fraser
|
||||
*/
|
||||
|
||||
@@ -46,11 +29,11 @@ FILE_LICENCE ( MIT );
|
||||
*/
|
||||
|
||||
#define FLAT_RING3_CS32 0xe023 /* GDT index 260 */
|
||||
#define FLAT_RING3_CS64 0xe033 /* GDT index 261 */
|
||||
#define FLAT_RING3_DS32 0xe02b /* GDT index 262 */
|
||||
#define FLAT_RING3_CS64 0xe033 /* GDT index 262 */
|
||||
#define FLAT_RING3_DS32 0xe02b /* GDT index 261 */
|
||||
#define FLAT_RING3_DS64 0x0000 /* NULL selector */
|
||||
#define FLAT_RING3_SS32 0xe02b /* GDT index 262 */
|
||||
#define FLAT_RING3_SS64 0xe02b /* GDT index 262 */
|
||||
#define FLAT_RING3_SS32 0xe02b /* GDT index 261 */
|
||||
#define FLAT_RING3_SS64 0xe02b /* GDT index 261 */
|
||||
|
||||
#define FLAT_KERNEL_DS64 FLAT_RING3_DS64
|
||||
#define FLAT_KERNEL_DS32 FLAT_RING3_DS32
|
||||
@@ -78,12 +61,12 @@ FILE_LICENCE ( MIT );
|
||||
#define __MACH2PHYS_VIRT_END 0xFFFF804000000000
|
||||
|
||||
#ifndef HYPERVISOR_VIRT_START
|
||||
#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
|
||||
#define HYPERVISOR_VIRT_END mk_unsigned_long(__HYPERVISOR_VIRT_END)
|
||||
#define HYPERVISOR_VIRT_START xen_mk_ulong(__HYPERVISOR_VIRT_START)
|
||||
#define HYPERVISOR_VIRT_END xen_mk_ulong(__HYPERVISOR_VIRT_END)
|
||||
#endif
|
||||
|
||||
#define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START)
|
||||
#define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END)
|
||||
#define MACH2PHYS_VIRT_START xen_mk_ulong(__MACH2PHYS_VIRT_START)
|
||||
#define MACH2PHYS_VIRT_END xen_mk_ulong(__MACH2PHYS_VIRT_END)
|
||||
#define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3)
|
||||
#ifndef machine_to_phys_mapping
|
||||
#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
|
||||
@@ -132,7 +115,35 @@ struct iret_context {
|
||||
/* Bottom of iret stack frame. */
|
||||
};
|
||||
|
||||
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
|
||||
#if defined(__XEN__) || defined(__XEN_TOOLS__)
|
||||
/* Anonymous unions include all permissible names (e.g., al/ah/ax/eax/rax). */
|
||||
#define __DECL_REG_LOHI(which) union { \
|
||||
uint64_t r ## which ## x; \
|
||||
uint32_t e ## which ## x; \
|
||||
uint16_t which ## x; \
|
||||
struct { \
|
||||
uint8_t which ## l; \
|
||||
uint8_t which ## h; \
|
||||
}; \
|
||||
}
|
||||
#define __DECL_REG_LO8(name) union { \
|
||||
uint64_t r ## name; \
|
||||
uint32_t e ## name; \
|
||||
uint16_t name; \
|
||||
uint8_t name ## l; \
|
||||
}
|
||||
#define __DECL_REG_LO16(name) union { \
|
||||
uint64_t r ## name; \
|
||||
uint32_t e ## name; \
|
||||
uint16_t name; \
|
||||
}
|
||||
#define __DECL_REG_HI(num) union { \
|
||||
uint64_t r ## num; \
|
||||
uint32_t r ## num ## d; \
|
||||
uint16_t r ## num ## w; \
|
||||
uint8_t r ## num ## b; \
|
||||
}
|
||||
#elif defined(__GNUC__) && !defined(__STRICT_ANSI__)
|
||||
/* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */
|
||||
#define __DECL_REG(name) union { \
|
||||
uint64_t r ## name, e ## name; \
|
||||
@@ -143,40 +154,51 @@ struct iret_context {
|
||||
#define __DECL_REG(name) uint64_t r ## name
|
||||
#endif
|
||||
|
||||
#ifndef __DECL_REG_LOHI
|
||||
#define __DECL_REG_LOHI(name) __DECL_REG(name ## x)
|
||||
#define __DECL_REG_LO8 __DECL_REG
|
||||
#define __DECL_REG_LO16 __DECL_REG
|
||||
#define __DECL_REG_HI(num) uint64_t r ## num
|
||||
#endif
|
||||
|
||||
struct cpu_user_regs {
|
||||
uint64_t r15;
|
||||
uint64_t r14;
|
||||
uint64_t r13;
|
||||
uint64_t r12;
|
||||
__DECL_REG(bp);
|
||||
__DECL_REG(bx);
|
||||
uint64_t r11;
|
||||
uint64_t r10;
|
||||
uint64_t r9;
|
||||
uint64_t r8;
|
||||
__DECL_REG(ax);
|
||||
__DECL_REG(cx);
|
||||
__DECL_REG(dx);
|
||||
__DECL_REG(si);
|
||||
__DECL_REG(di);
|
||||
__DECL_REG_HI(15);
|
||||
__DECL_REG_HI(14);
|
||||
__DECL_REG_HI(13);
|
||||
__DECL_REG_HI(12);
|
||||
__DECL_REG_LO8(bp);
|
||||
__DECL_REG_LOHI(b);
|
||||
__DECL_REG_HI(11);
|
||||
__DECL_REG_HI(10);
|
||||
__DECL_REG_HI(9);
|
||||
__DECL_REG_HI(8);
|
||||
__DECL_REG_LOHI(a);
|
||||
__DECL_REG_LOHI(c);
|
||||
__DECL_REG_LOHI(d);
|
||||
__DECL_REG_LO8(si);
|
||||
__DECL_REG_LO8(di);
|
||||
uint32_t error_code; /* private */
|
||||
uint32_t entry_vector; /* private */
|
||||
__DECL_REG(ip);
|
||||
__DECL_REG_LO16(ip);
|
||||
uint16_t cs, _pad0[1];
|
||||
uint8_t saved_upcall_mask;
|
||||
uint8_t _pad1[3];
|
||||
__DECL_REG(flags); /* rflags.IF == !saved_upcall_mask */
|
||||
__DECL_REG(sp);
|
||||
__DECL_REG_LO16(flags); /* rflags.IF == !saved_upcall_mask */
|
||||
__DECL_REG_LO8(sp);
|
||||
uint16_t ss, _pad2[3];
|
||||
uint16_t es, _pad3[3];
|
||||
uint16_t ds, _pad4[3];
|
||||
uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base. */
|
||||
uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */
|
||||
uint16_t fs, _pad5[3];
|
||||
uint16_t gs, _pad6[3];
|
||||
};
|
||||
typedef struct cpu_user_regs cpu_user_regs_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(cpu_user_regs_t);
|
||||
|
||||
#undef __DECL_REG
|
||||
#undef __DECL_REG_LOHI
|
||||
#undef __DECL_REG_LO8
|
||||
#undef __DECL_REG_LO16
|
||||
#undef __DECL_REG_HI
|
||||
|
||||
#define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12)
|
||||
#define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12)
|
||||
|
||||
@@ -1,26 +1,9 @@
|
||||
/* SPDX-License-Identifier: MIT */
|
||||
/******************************************************************************
|
||||
* arch-x86/xen.h
|
||||
*
|
||||
* Guest OS interface to x86 Xen.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to
|
||||
* deal in the Software without restriction, including without limitation the
|
||||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Copyright (c) 2004-2006, K A Fraser
|
||||
*/
|
||||
|
||||
@@ -56,13 +39,20 @@ FILE_LICENCE ( MIT );
|
||||
#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
|
||||
#define XEN_GUEST_HANDLE_PARAM(name) XEN_GUEST_HANDLE(name)
|
||||
#define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = val; } while (0)
|
||||
#ifdef __XEN_TOOLS__
|
||||
#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0)
|
||||
#endif
|
||||
#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
|
||||
|
||||
#if defined(__i386__)
|
||||
# ifdef __XEN__
|
||||
__DeFiNe__ __DECL_REG_LO8(which) uint32_t e ## which ## x
|
||||
__DeFiNe__ __DECL_REG_LO16(name) union { uint32_t e ## name; }
|
||||
# endif
|
||||
#include "xen-x86_32.h"
|
||||
# ifdef __XEN__
|
||||
__UnDeF__ __DECL_REG_LO8
|
||||
__UnDeF__ __DECL_REG_LO16
|
||||
__DeFiNe__ __DECL_REG_LO8(which) e ## which ## x
|
||||
__DeFiNe__ __DECL_REG_LO16(name) e ## name
|
||||
# endif
|
||||
#elif defined(__x86_64__)
|
||||
#include "xen-x86_64.h"
|
||||
#endif
|
||||
@@ -70,6 +60,7 @@ FILE_LICENCE ( MIT );
|
||||
#ifndef __ASSEMBLY__
|
||||
typedef unsigned long xen_pfn_t;
|
||||
#define PRI_xen_pfn "lx"
|
||||
#define PRIu_xen_pfn "lu"
|
||||
#endif
|
||||
|
||||
#define XEN_HAVE_PV_GUEST_ENTRY 1
|
||||
@@ -137,6 +128,12 @@ typedef unsigned long xen_ulong_t;
|
||||
* Level == 1: Kernel may enter
|
||||
* Level == 2: Kernel may enter
|
||||
* Level == 3: Everyone may enter
|
||||
*
|
||||
* Note: For compatibility with kernels not setting up exception handlers
|
||||
* early enough, Xen will avoid trying to inject #GP (and hence crash
|
||||
* the domain) when an RDMSR would require this, but no handler was
|
||||
* set yet. The precise conditions are implementation specific, and
|
||||
* new code may not rely on such behavior anyway.
|
||||
*/
|
||||
#define TI_GET_DPL(_ti) ((_ti)->flags & 3)
|
||||
#define TI_GET_IF(_ti) ((_ti)->flags & 4)
|
||||
@@ -157,14 +154,12 @@ typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
|
||||
* The following is all CPU context. Note that the fpu_ctxt block is filled
|
||||
* in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
|
||||
*
|
||||
* Also note that when calling DOMCTL_setvcpucontext and VCPU_initialise
|
||||
* for HVM and PVH guests, not all information in this structure is updated:
|
||||
* Also note that when calling DOMCTL_setvcpucontext for HVM guests, not all
|
||||
* information in this structure is updated, the fields read include: fpu_ctxt
|
||||
* (if VGCT_I387_VALID is set), flags, user_regs and debugreg[*].
|
||||
*
|
||||
* - For HVM guests, the structures read include: fpu_ctxt (if
|
||||
* VGCT_I387_VALID is set), flags, user_regs, debugreg[*]
|
||||
*
|
||||
* - PVH guests are the same as HVM guests, but additionally use ctrlreg[3] to
|
||||
* set cr3. All other fields not used should be set to 0.
|
||||
* Note: VCPUOP_initialise for HVM guests is non-symetric with
|
||||
* DOMCTL_setvcpucontext, and uses struct vcpu_hvm_context from hvm/hvm_vcpu.h
|
||||
*/
|
||||
struct vcpu_guest_context {
|
||||
/* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
|
||||
@@ -222,14 +217,117 @@ typedef struct vcpu_guest_context vcpu_guest_context_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
|
||||
|
||||
struct arch_shared_info {
|
||||
unsigned long max_pfn; /* max pfn that appears in table */
|
||||
/* Frame containing list of mfns containing list of mfns containing p2m. */
|
||||
/*
|
||||
* Number of valid entries in the p2m table(s) anchored at
|
||||
* pfn_to_mfn_frame_list_list and/or p2m_vaddr.
|
||||
*/
|
||||
unsigned long max_pfn;
|
||||
/*
|
||||
* Frame containing list of mfns containing list of mfns containing p2m.
|
||||
* A value of 0 indicates it has not yet been set up, ~0 indicates it has
|
||||
* been set to invalid e.g. due to the p2m being too large for the 3-level
|
||||
* p2m tree. In this case the linear mapper p2m list anchored at p2m_vaddr
|
||||
* is to be used.
|
||||
*/
|
||||
xen_pfn_t pfn_to_mfn_frame_list_list;
|
||||
unsigned long nmi_reason;
|
||||
uint64_t pad[32];
|
||||
/*
|
||||
* Following three fields are valid if p2m_cr3 contains a value different
|
||||
* from 0.
|
||||
* p2m_cr3 is the root of the address space where p2m_vaddr is valid.
|
||||
* p2m_cr3 is in the same format as a cr3 value in the vcpu register state
|
||||
* and holds the folded machine frame number (via xen_pfn_to_cr3) of a
|
||||
* L3 or L4 page table.
|
||||
* p2m_vaddr holds the virtual address of the linear p2m list. All entries
|
||||
* in the range [0...max_pfn[ are accessible via this pointer.
|
||||
* p2m_generation will be incremented by the guest before and after each
|
||||
* change of the mappings of the p2m list. p2m_generation starts at 0 and
|
||||
* a value with the least significant bit set indicates that a mapping
|
||||
* update is in progress. This allows guest external software (e.g. in Dom0)
|
||||
* to verify that read mappings are consistent and whether they have changed
|
||||
* since the last check.
|
||||
* Modifying a p2m element in the linear p2m list is allowed via an atomic
|
||||
* write only.
|
||||
*/
|
||||
unsigned long p2m_cr3; /* cr3 value of the p2m address space */
|
||||
unsigned long p2m_vaddr; /* virtual address of the p2m list */
|
||||
unsigned long p2m_generation; /* generation count of p2m mapping */
|
||||
#ifdef __i386__
|
||||
/* There's no room for this field in the generic structure. */
|
||||
uint32_t wc_sec_hi;
|
||||
#endif
|
||||
};
|
||||
typedef struct arch_shared_info arch_shared_info_t;
|
||||
|
||||
#if defined(__XEN__) || defined(__XEN_TOOLS__)
|
||||
/*
|
||||
* struct xen_arch_domainconfig's ABI is covered by
|
||||
* XEN_DOMCTL_INTERFACE_VERSION.
|
||||
*/
|
||||
struct xen_arch_domainconfig {
|
||||
#define _XEN_X86_EMU_LAPIC 0
|
||||
#define XEN_X86_EMU_LAPIC (1U<<_XEN_X86_EMU_LAPIC)
|
||||
#define _XEN_X86_EMU_HPET 1
|
||||
#define XEN_X86_EMU_HPET (1U<<_XEN_X86_EMU_HPET)
|
||||
#define _XEN_X86_EMU_PM 2
|
||||
#define XEN_X86_EMU_PM (1U<<_XEN_X86_EMU_PM)
|
||||
#define _XEN_X86_EMU_RTC 3
|
||||
#define XEN_X86_EMU_RTC (1U<<_XEN_X86_EMU_RTC)
|
||||
#define _XEN_X86_EMU_IOAPIC 4
|
||||
#define XEN_X86_EMU_IOAPIC (1U<<_XEN_X86_EMU_IOAPIC)
|
||||
#define _XEN_X86_EMU_PIC 5
|
||||
#define XEN_X86_EMU_PIC (1U<<_XEN_X86_EMU_PIC)
|
||||
#define _XEN_X86_EMU_VGA 6
|
||||
#define XEN_X86_EMU_VGA (1U<<_XEN_X86_EMU_VGA)
|
||||
#define _XEN_X86_EMU_IOMMU 7
|
||||
#define XEN_X86_EMU_IOMMU (1U<<_XEN_X86_EMU_IOMMU)
|
||||
#define _XEN_X86_EMU_PIT 8
|
||||
#define XEN_X86_EMU_PIT (1U<<_XEN_X86_EMU_PIT)
|
||||
#define _XEN_X86_EMU_USE_PIRQ 9
|
||||
#define XEN_X86_EMU_USE_PIRQ (1U<<_XEN_X86_EMU_USE_PIRQ)
|
||||
#define _XEN_X86_EMU_VPCI 10
|
||||
#define XEN_X86_EMU_VPCI (1U<<_XEN_X86_EMU_VPCI)
|
||||
|
||||
#define XEN_X86_EMU_ALL (XEN_X86_EMU_LAPIC | XEN_X86_EMU_HPET | \
|
||||
XEN_X86_EMU_PM | XEN_X86_EMU_RTC | \
|
||||
XEN_X86_EMU_IOAPIC | XEN_X86_EMU_PIC | \
|
||||
XEN_X86_EMU_VGA | XEN_X86_EMU_IOMMU | \
|
||||
XEN_X86_EMU_PIT | XEN_X86_EMU_USE_PIRQ |\
|
||||
XEN_X86_EMU_VPCI)
|
||||
uint32_t emulation_flags;
|
||||
|
||||
/*
|
||||
* Select whether to use a relaxed behavior for accesses to MSRs not explicitly
|
||||
* handled by Xen instead of injecting a #GP to the guest. Note this option
|
||||
* doesn't allow the guest to read or write to the underlying MSR.
|
||||
*/
|
||||
#define XEN_X86_MSR_RELAXED (1u << 0)
|
||||
uint32_t misc_flags;
|
||||
};
|
||||
|
||||
/* Max XEN_X86_* constant. Used for ABI checking. */
|
||||
#define XEN_X86_MISC_FLAGS_MAX XEN_X86_MSR_RELAXED
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Representations of architectural CPUID and MSR information. Used as the
|
||||
* serialised version of Xen's internal representation.
|
||||
*/
|
||||
typedef struct xen_cpuid_leaf {
|
||||
#define XEN_CPUID_NO_SUBLEAF 0xffffffffu
|
||||
uint32_t leaf, subleaf;
|
||||
uint32_t a, b, c, d;
|
||||
} xen_cpuid_leaf_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_cpuid_leaf_t);
|
||||
|
||||
typedef struct xen_msr_entry {
|
||||
uint32_t idx;
|
||||
uint32_t flags; /* Reserved MBZ. */
|
||||
uint64_t val;
|
||||
} xen_msr_entry_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_msr_entry_t);
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
@@ -262,6 +360,13 @@ typedef struct arch_shared_info arch_shared_info_t;
|
||||
#define XEN_CPUID XEN_EMULATE_PREFIX "cpuid"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Debug console IO port, also called "port E9 hack". Each character written
|
||||
* to this IO port will be printed on the hypervisor console, subject to log
|
||||
* level restrictions.
|
||||
*/
|
||||
#define XEN_HVM_DEBUGCONS_IOPORT 0xe9
|
||||
|
||||
#endif /* __XEN_PUBLIC_ARCH_X86_XEN_H__ */
|
||||
|
||||
/*
|
||||
|
||||
Reference in New Issue
Block a user