[build] Mark core riscv64 files as permitted for UEFI Secure Boot

Signed-off-by: Michael Brown <mcb30@ipxe.org>

src/arch/riscv/core/riscv_string.c

@@ -28,6 +28,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #include <string.h>
 

src/arch/riscv/core/riscv_strings.S

@@ -22,6 +22,7 @@
  */
 
 	FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
+	FILE_SECBOOT ( PERMITTED );
 
 /** @file
  *

src/arch/riscv/core/riscv_tcpip.S

@@ -22,6 +22,7 @@
  */
 
 	FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
+	FILE_SECBOOT ( PERMITTED );
 
 /** @file
  *

src/arch/riscv/include/bits/bigint.h

@@ -7,6 +7,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #include <stdint.h>
 #include <string.h>

src/arch/riscv/include/bits/byteswap.h

@@ -10,6 +10,7 @@
 #include <stdint.h>
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 extern __asmcall uint64_t riscv_swap_word ( uint64_t x );
 extern __asmcall unsigned long riscv_swap_half ( unsigned long x );

src/arch/riscv/include/bits/compiler.h

@@ -2,6 +2,7 @@
 #define _BITS_COMPILER_H
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 /** Dummy relocation type */
 #define RELOC_TYPE_NONE R_RISCV_NONE

src/arch/riscv/include/bits/dma.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #include <ipxe/riscv_dma.h>
 

src/arch/riscv/include/bits/endian.h

@@ -2,6 +2,7 @@
 #define _BITS_ENDIAN_H
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #define __BYTE_ORDER __LITTLE_ENDIAN
 

src/arch/riscv/include/bits/errfile.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 /**
  * @addtogroup errfile Error file identifiers

src/arch/riscv/include/bits/io.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 /** Page shift */
 #define PAGE_SHIFT 12

src/arch/riscv/include/bits/iomap.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #include <ipxe/svpage.h>
 

src/arch/riscv/include/bits/nap.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 /**
  * Sleep until next CPU interrupt

src/arch/riscv/include/bits/profile.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #include <stdint.h>
 

src/arch/riscv/include/bits/reboot.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #include <ipxe/sbi_reboot.h>
 

src/arch/riscv/include/bits/stdint.h

@@ -2,6 +2,7 @@
 #define _BITS_STDINT_H
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 typedef __SIZE_TYPE__		size_t;
 typedef signed long		ssize_t;

src/arch/riscv/include/bits/string.h

@@ -2,6 +2,7 @@
 #define _BITS_STRING_H
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 /** @file
  *

src/arch/riscv/include/bits/strings.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 extern __asmcall unsigned long riscv_ffs ( unsigned long value );
 extern __asmcall unsigned long riscv_fls ( unsigned long value );

src/arch/riscv/include/bits/tcpip.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 extern uint16_t tcpip_continue_chksum ( uint16_t partial, const void *data,
 					size_t len );

src/arch/riscv/include/bits/virt_offset.h

@@ -13,6 +13,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 /**
  * Read virtual address offset held in thread pointer register

src/arch/riscv/include/ipxe/riscv_dma.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #ifdef DMAAPI_RISCV
 #define DMAAPI_PREFIX_riscv

src/arch/riscv/include/ipxe/riscv_io.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #ifdef IOAPI_RISCV
 #define IOAPI_PREFIX_riscv

src/arch/riscv/include/ipxe/sbi_reboot.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #ifdef REBOOT_SBI
 #define REBOOT_PREFIX_sbi

src/arch/riscv/include/ipxe/svpage.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #include <stdint.h>
 

src/arch/riscv64/core/riscv64_byteswap.S

@@ -22,6 +22,7 @@
  */
 
 	FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
+	FILE_SECBOOT ( PERMITTED );
 
 /** @file
  *

src/arch/riscv64/include/ipxe/efi/dhcparch.h

@@ -8,6 +8,7 @@
  */
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 #include <ipxe/dhcp.h>
 

src/arch/riscv64/include/limits.h

@@ -2,6 +2,7 @@
 #define LIMITS_H	1
 
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
 
 /* Number of bits in a `char' */
 #define CHAR_BIT	8

src/libgcc/implicit.c

@@ -9,6 +9,9 @@
  *
  */
 
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+FILE_SECBOOT ( PERMITTED );
+
 #include <string.h>
 
 void * gcc_implicit_memcpy ( void *dest, const void *src,