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Introduce the new timer subsystem.
Timer subsystem initialization code in core/timer.c Split the BIOS and RTDSC timer drivers from i386_timer.c Split arch/i386/firmware/pcbios/bios.c into the RTSDC timer driver and arch/i386/core/nap.c Split the headers properly: include/unistd.h - delay functions to be used by the gPXE core and drivers. include/gpxe/timer.h - the fimer subsystem interface to be used by the timer drivers and currticks() to be used by the code gPXE subsystems. include/latch.h - removed include/timer.h - scheduled for removal. Some driver are using currticks, which is only for core subsystems. Signed-off-by: Alexey Zaytsev <alexey.zaytsev@gmail.com>
This commit is contained in:
Alexey Zaytsev
@@ -1,18 +1,58 @@
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/* A couple of routines to implement a low-overhead timer for drivers */
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/*
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/*
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* arch/i386/core/i386_timer.c
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*
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* Use the "System Timer 2" to implement the udelay callback in
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* the BIOS timer driver. Also used to calibrate the clock rate
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* in the RTDSC timer driver.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2, or (at
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* your option) any later version.
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*/
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#include "timer.h"
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#include "latch.h"
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#include <io.h>
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#include <gpxe/init.h>
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#include <stddef.h>
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#include <bits/timer2.h>
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#include <gpxe/timer.h>
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#include <io.h>
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void __load_timer2(unsigned int ticks)
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/* Timers tick over at this rate */
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#define TIMER2_TICK_RATE 1193180U
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/* Parallel Peripheral Controller Port B */
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#define PPC_PORTB 0x61
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/* Meaning of the port bits */
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#define PPCB_T2OUT 0x20 /* Bit 5 */
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#define PPCB_SPKR 0x02 /* Bit 1 */
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#define PPCB_T2GATE 0x01 /* Bit 0 */
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/* Ports for the 8254 timer chip */
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#define TIMER2_PORT 0x42
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#define TIMER_MODE_PORT 0x43
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/* Meaning of the mode bits */
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#define TIMER0_SEL 0x00
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#define TIMER1_SEL 0x40
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#define TIMER2_SEL 0x80
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#define READBACK_SEL 0xC0
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#define LATCH_COUNT 0x00
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#define LOBYTE_ACCESS 0x10
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#define HIBYTE_ACCESS 0x20
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#define WORD_ACCESS 0x30
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#define MODE0 0x00
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#define MODE1 0x02
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#define MODE2 0x04
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#define MODE3 0x06
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#define MODE4 0x08
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#define MODE5 0x0A
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#define BINARY_COUNT 0x00
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#define BCD_COUNT 0x01
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static void load_timer2(unsigned int ticks)
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{
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/*
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* Now let's take care of PPC channel 2
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@@ -35,162 +75,15 @@ void __load_timer2(unsigned int ticks)
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outb(ticks >> 8, TIMER2_PORT);
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}
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static int __timer2_running(void)
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static int timer2_running(void)
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{
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return ((inb(PPC_PORTB) & PPCB_T2OUT) == 0);
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}
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#if !defined(CONFIG_TSC_CURRTICKS)
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static void setup_timers(void)
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void i386_timer2_udelay(unsigned int usecs)
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{
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return;
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load_timer2((usecs * TIMER2_TICK_RATE)/USECS_IN_SEC);
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while (timer2_running())
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;
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}
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void load_timer2(unsigned int ticks)
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{
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return __load_timer2(ticks);
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}
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int timer2_running(void)
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{
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return __timer2_running();
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}
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void ndelay(unsigned int nsecs)
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{
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waiton_timer2((nsecs * CLOCK_TICK_RATE)/1000000000);
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}
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void udelay(unsigned int usecs)
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{
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waiton_timer2((usecs * TICKS_PER_MS)/1000);
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}
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#endif /* !defined(CONFIG_TSC_CURRTICKS) */
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#if defined(CONFIG_TSC_CURRTICKS)
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#define rdtsc(low,high) \
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__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
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#define rdtscll(val) \
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__asm__ __volatile__ ("rdtsc" : "=A" (val))
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/* Number of clock ticks to time with the rtc */
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#define LATCH 0xFF
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#define LATCHES_PER_SEC ((CLOCK_TICK_RATE + (LATCH/2))/LATCH)
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#define TICKS_PER_LATCH ((LATCHES_PER_SEC + (TICKS_PER_SEC/2))/TICKS_PER_SEC)
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static void sleep_latch(void)
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{
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__load_timer2(LATCH);
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while(__timer2_running());
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}
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/* ------ Calibrate the TSC -------
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* Time how long it takes to excute a loop that runs in known time.
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* And find the convertion needed to get to CLOCK_TICK_RATE
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*/
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static unsigned long long calibrate_tsc(void)
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{
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unsigned long startlow, starthigh;
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unsigned long endlow, endhigh;
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rdtsc(startlow,starthigh);
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sleep_latch();
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rdtsc(endlow,endhigh);
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/* 64-bit subtract - gcc just messes up with long longs */
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__asm__("subl %2,%0\n\t"
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"sbbl %3,%1"
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:"=a" (endlow), "=d" (endhigh)
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:"g" (startlow), "g" (starthigh),
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"0" (endlow), "1" (endhigh));
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/* Error: ECPUTOOFAST */
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if (endhigh)
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goto bad_ctc;
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endlow *= TICKS_PER_LATCH;
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return endlow;
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/*
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* The CTC wasn't reliable: we got a hit on the very first read,
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* or the CPU was so fast/slow that the quotient wouldn't fit in
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* 32 bits..
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*/
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bad_ctc:
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printf("bad_ctc\n");
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return 0;
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}
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static unsigned long clocks_per_tick;
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static void setup_timers(void)
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{
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if (!clocks_per_tick) {
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clocks_per_tick = calibrate_tsc();
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/* Display the CPU Mhz to easily test if the calibration was bad */
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printf("CPU %ld Mhz\n", (clocks_per_tick/1000 * TICKS_PER_SEC)/1000);
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}
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}
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unsigned long currticks(void)
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{
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unsigned long clocks_high, clocks_low;
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unsigned long currticks;
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/* Read the Time Stamp Counter */
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rdtsc(clocks_low, clocks_high);
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/* currticks = clocks / clocks_per_tick; */
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__asm__("divl %1"
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:"=a" (currticks)
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:"r" (clocks_per_tick), "0" (clocks_low), "d" (clocks_high));
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return currticks;
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}
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static unsigned long long timer_timeout;
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static int __timer_running(void)
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{
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unsigned long long now;
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rdtscll(now);
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return now < timer_timeout;
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}
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void udelay(unsigned int usecs)
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{
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unsigned long long now;
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rdtscll(now);
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timer_timeout = now + usecs * ((clocks_per_tick * TICKS_PER_SEC)/(1000*1000));
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while(__timer_running());
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}
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void ndelay(unsigned int nsecs)
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{
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unsigned long long now;
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rdtscll(now);
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timer_timeout = now + nsecs * ((clocks_per_tick * TICKS_PER_SEC)/(1000*1000*1000));
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while(__timer_running());
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}
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void load_timer2(unsigned int timer2_ticks)
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{
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unsigned long long now;
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unsigned long clocks;
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rdtscll(now);
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clocks = timer2_ticks * ((clocks_per_tick * TICKS_PER_SEC)/CLOCK_TICK_RATE);
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timer_timeout = now + clocks;
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}
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int timer2_running(void)
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{
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return __timer_running();
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}
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#endif /* RTC_CURRTICKS */
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struct init_fn timer_init_fn __init_fn ( INIT_NORMAL ) = {
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.initialise = setup_timers,
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};
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12
src/arch/i386/core/nap.c
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12
src/arch/i386/core/nap.c
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@@ -0,0 +1,12 @@
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#include <realmode.h>
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#include <bios.h>
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/**************************************************************************
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* Save power by halting the CPU until the next interrupt
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**************************************************************************/
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void cpu_nap ( void ) {
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__asm__ __volatile__ ( REAL_CODE ( "sti\n\t"
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"hlt\n\t"
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"cli\n\t" ) : : );
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}
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