mirror of
https://github.com/ipxe/ipxe
synced 2025-12-12 14:32:49 +03:00
Merge branch 'xl0-timer'
This commit is contained in:
@@ -7,6 +7,7 @@ ISOLINUX_BIN = /usr/lib/syslinux/isolinux.bin
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SRCDIRS += arch/i386/core arch/i386/transitions arch/i386/prefix
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SRCDIRS += arch/i386/firmware/pcbios
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SRCDIRS += arch/i386/image
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SRCDIRS += arch/i386/drivers
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SRCDIRS += arch/i386/drivers/bus
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SRCDIRS += arch/i386/drivers/net
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SRCDIRS += arch/i386/drivers/disk
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@@ -1,18 +1,58 @@
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/* A couple of routines to implement a low-overhead timer for drivers */
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/*
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/*
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* arch/i386/core/i386_timer.c
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*
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* Use the "System Timer 2" to implement the udelay callback in
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* the BIOS timer driver. Also used to calibrate the clock rate
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* in the RTDSC timer driver.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2, or (at
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* your option) any later version.
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*/
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#include "timer.h"
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#include "latch.h"
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#include <io.h>
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#include <gpxe/init.h>
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#include <stddef.h>
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#include <bits/timer2.h>
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#include <gpxe/timer.h>
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#include <io.h>
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void __load_timer2(unsigned int ticks)
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/* Timers tick over at this rate */
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#define TIMER2_TICK_RATE 1193180U
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/* Parallel Peripheral Controller Port B */
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#define PPC_PORTB 0x61
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/* Meaning of the port bits */
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#define PPCB_T2OUT 0x20 /* Bit 5 */
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#define PPCB_SPKR 0x02 /* Bit 1 */
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#define PPCB_T2GATE 0x01 /* Bit 0 */
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/* Ports for the 8254 timer chip */
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#define TIMER2_PORT 0x42
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#define TIMER_MODE_PORT 0x43
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/* Meaning of the mode bits */
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#define TIMER0_SEL 0x00
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#define TIMER1_SEL 0x40
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#define TIMER2_SEL 0x80
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#define READBACK_SEL 0xC0
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#define LATCH_COUNT 0x00
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#define LOBYTE_ACCESS 0x10
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#define HIBYTE_ACCESS 0x20
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#define WORD_ACCESS 0x30
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#define MODE0 0x00
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#define MODE1 0x02
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#define MODE2 0x04
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#define MODE3 0x06
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#define MODE4 0x08
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#define MODE5 0x0A
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#define BINARY_COUNT 0x00
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#define BCD_COUNT 0x01
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static void load_timer2(unsigned int ticks)
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{
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/*
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* Now let's take care of PPC channel 2
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@@ -35,162 +75,15 @@ void __load_timer2(unsigned int ticks)
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outb(ticks >> 8, TIMER2_PORT);
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}
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static int __timer2_running(void)
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static int timer2_running(void)
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{
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return ((inb(PPC_PORTB) & PPCB_T2OUT) == 0);
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}
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#if !defined(CONFIG_TSC_CURRTICKS)
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static void setup_timers(void)
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void i386_timer2_udelay(unsigned int usecs)
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{
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return;
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load_timer2((usecs * TIMER2_TICK_RATE)/USECS_IN_SEC);
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while (timer2_running())
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;
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}
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void load_timer2(unsigned int ticks)
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{
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return __load_timer2(ticks);
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}
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int timer2_running(void)
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{
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return __timer2_running();
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}
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void ndelay(unsigned int nsecs)
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{
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waiton_timer2((nsecs * CLOCK_TICK_RATE)/1000000000);
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}
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void udelay(unsigned int usecs)
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{
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waiton_timer2((usecs * TICKS_PER_MS)/1000);
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}
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#endif /* !defined(CONFIG_TSC_CURRTICKS) */
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#if defined(CONFIG_TSC_CURRTICKS)
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#define rdtsc(low,high) \
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__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
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#define rdtscll(val) \
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__asm__ __volatile__ ("rdtsc" : "=A" (val))
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/* Number of clock ticks to time with the rtc */
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#define LATCH 0xFF
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#define LATCHES_PER_SEC ((CLOCK_TICK_RATE + (LATCH/2))/LATCH)
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#define TICKS_PER_LATCH ((LATCHES_PER_SEC + (TICKS_PER_SEC/2))/TICKS_PER_SEC)
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static void sleep_latch(void)
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{
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__load_timer2(LATCH);
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while(__timer2_running());
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}
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/* ------ Calibrate the TSC -------
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* Time how long it takes to excute a loop that runs in known time.
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* And find the convertion needed to get to CLOCK_TICK_RATE
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*/
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static unsigned long long calibrate_tsc(void)
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{
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unsigned long startlow, starthigh;
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unsigned long endlow, endhigh;
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rdtsc(startlow,starthigh);
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sleep_latch();
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rdtsc(endlow,endhigh);
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/* 64-bit subtract - gcc just messes up with long longs */
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__asm__("subl %2,%0\n\t"
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"sbbl %3,%1"
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:"=a" (endlow), "=d" (endhigh)
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:"g" (startlow), "g" (starthigh),
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"0" (endlow), "1" (endhigh));
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/* Error: ECPUTOOFAST */
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if (endhigh)
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goto bad_ctc;
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endlow *= TICKS_PER_LATCH;
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return endlow;
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/*
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* The CTC wasn't reliable: we got a hit on the very first read,
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* or the CPU was so fast/slow that the quotient wouldn't fit in
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* 32 bits..
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*/
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bad_ctc:
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printf("bad_ctc\n");
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return 0;
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}
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static unsigned long clocks_per_tick;
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static void setup_timers(void)
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{
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if (!clocks_per_tick) {
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clocks_per_tick = calibrate_tsc();
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/* Display the CPU Mhz to easily test if the calibration was bad */
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printf("CPU %ld Mhz\n", (clocks_per_tick/1000 * TICKS_PER_SEC)/1000);
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}
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}
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unsigned long currticks(void)
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{
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unsigned long clocks_high, clocks_low;
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unsigned long currticks;
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/* Read the Time Stamp Counter */
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rdtsc(clocks_low, clocks_high);
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/* currticks = clocks / clocks_per_tick; */
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__asm__("divl %1"
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:"=a" (currticks)
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:"r" (clocks_per_tick), "0" (clocks_low), "d" (clocks_high));
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return currticks;
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}
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static unsigned long long timer_timeout;
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static int __timer_running(void)
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{
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unsigned long long now;
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rdtscll(now);
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return now < timer_timeout;
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}
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void udelay(unsigned int usecs)
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{
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unsigned long long now;
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rdtscll(now);
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timer_timeout = now + usecs * ((clocks_per_tick * TICKS_PER_SEC)/(1000*1000));
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while(__timer_running());
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}
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void ndelay(unsigned int nsecs)
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{
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unsigned long long now;
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rdtscll(now);
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timer_timeout = now + nsecs * ((clocks_per_tick * TICKS_PER_SEC)/(1000*1000*1000));
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while(__timer_running());
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}
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void load_timer2(unsigned int timer2_ticks)
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{
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unsigned long long now;
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unsigned long clocks;
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rdtscll(now);
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clocks = timer2_ticks * ((clocks_per_tick * TICKS_PER_SEC)/CLOCK_TICK_RATE);
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timer_timeout = now + clocks;
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}
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int timer2_running(void)
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{
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return __timer_running();
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}
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#endif /* RTC_CURRTICKS */
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struct init_fn timer_init_fn __init_fn ( INIT_NORMAL ) = {
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.initialise = setup_timers,
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};
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12
src/arch/i386/core/nap.c
Normal file
12
src/arch/i386/core/nap.c
Normal file
@@ -0,0 +1,12 @@
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#include <realmode.h>
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#include <bios.h>
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/**************************************************************************
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* Save power by halting the CPU until the next interrupt
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**************************************************************************/
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void cpu_nap ( void ) {
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__asm__ __volatile__ ( REAL_CODE ( "sti\n\t"
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"hlt\n\t"
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"cli\n\t" ) : : );
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}
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57
src/arch/i386/drivers/timer_bios.c
Normal file
57
src/arch/i386/drivers/timer_bios.c
Normal file
@@ -0,0 +1,57 @@
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/*
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* Etherboot routines for PCBIOS firmware.
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*
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* Body of routines taken from old pcbios.S
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*/
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#include <gpxe/init.h>
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#include <gpxe/timer.h>
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#include <stdio.h>
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#include <realmode.h>
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#include <bios.h>
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#include <bits/timer2.h>
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/* A bit faster actually, but we don't care. */
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#define TIMER2_TICKS_PER_SEC 18
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/*
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* Use direct memory access to BIOS variables, longword 0040:006C (ticks
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* today) and byte 0040:0070 (midnight crossover flag) instead of calling
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* timeofday BIOS interrupt.
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*/
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static tick_t bios_currticks ( void ) {
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static int days = 0;
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uint32_t ticks;
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uint8_t midnight;
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/* Re-enable interrupts so that the timer interrupt can occur */
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__asm__ __volatile__ ( REAL_CODE ( "sti\n\t"
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"nop\n\t"
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"nop\n\t"
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"cli\n\t" ) : : );
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get_real ( ticks, BDA_SEG, 0x006c );
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get_real ( midnight, BDA_SEG, 0x0070 );
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if ( midnight ) {
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midnight = 0;
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put_real ( midnight, BDA_SEG, 0x0070 );
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days += 0x1800b0;
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}
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return ( (days + ticks) * (USECS_IN_SEC / TIMER2_TICKS_PER_SEC) );
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}
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static int bios_ts_init(void)
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{
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DBG("BIOS timer installed\n");
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return 0;
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}
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struct timer bios_ts __timer ( 02 ) = {
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.init = bios_ts_init,
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.udelay = i386_timer2_udelay,
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.currticks = bios_currticks,
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};
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69
src/arch/i386/drivers/timer_rdtsc.c
Normal file
69
src/arch/i386/drivers/timer_rdtsc.c
Normal file
@@ -0,0 +1,69 @@
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#include <gpxe/init.h>
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#include <gpxe/timer.h>
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#include <errno.h>
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#include <stdio.h>
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#include <bits/cpu.h>
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#include <bits/timer2.h>
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#include <io.h>
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#define rdtsc(low,high) \
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__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
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#define rdtscll(val) \
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__asm__ __volatile__ ("rdtsc" : "=A" (val))
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/* Measure how many clocks we get in one microsecond */
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static inline uint64_t calibrate_tsc(void)
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{
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uint64_t rdtsc_start;
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uint64_t rdtsc_end;
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rdtscll(rdtsc_start);
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i386_timer2_udelay(USECS_IN_MSEC);
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rdtscll(rdtsc_end);
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return (rdtsc_end - rdtsc_start) / USECS_IN_MSEC;
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}
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static uint32_t clocks_per_usec = 0;
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/* We measure time in microseconds. */
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static tick_t rdtsc_currticks(void)
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{
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uint64_t clocks;
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/* Read the Time Stamp Counter */
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rdtscll(clocks);
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return clocks / clocks_per_usec;
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}
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static int rdtsc_ts_init(void)
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{
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struct cpuinfo_x86 cpu_info;
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get_cpuinfo(&cpu_info);
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if (cpu_info.features & X86_FEATURE_TSC) {
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clocks_per_usec= calibrate_tsc();
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if (clocks_per_usec) {
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DBG("RDTSC ticksource installed. CPU running at %ld Mhz\n",
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clocks_per_usec);
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return 0;
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}
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}
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DBG("RDTSC ticksource not available on this machine.\n");
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return -ENODEV;
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}
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struct timer rdtsc_ts __timer (01) = {
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.init = rdtsc_ts_init,
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.udelay = generic_currticks_udelay,
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.currticks = rdtsc_currticks,
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};
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@@ -1,55 +0,0 @@
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/* Etherboot routines for PCBIOS firmware.
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*
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* Body of routines taken from old pcbios.S
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*/
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#include <stdint.h>
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#include <realmode.h>
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#include <bios.h>
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#define CF ( 1 << 0 )
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/**************************************************************************
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CURRTICKS - Get Time
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Use direct memory access to BIOS variables, longword 0040:006C (ticks
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today) and byte 0040:0070 (midnight crossover flag) instead of calling
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timeofday BIOS interrupt.
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**************************************************************************/
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#if defined(CONFIG_TSC_CURRTICKS)
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#undef CONFIG_BIOS_CURRTICKS
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#else
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#define CONFIG_BIOS_CURRTICKS 1
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#endif
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#if defined(CONFIG_BIOS_CURRTICKS)
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unsigned long currticks ( void ) {
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static uint32_t days = 0;
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uint32_t ticks;
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uint8_t midnight;
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/* Re-enable interrupts so that the timer interrupt can occur
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*/
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__asm__ __volatile__ ( REAL_CODE ( "sti\n\t"
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"nop\n\t"
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"nop\n\t"
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"cli\n\t" ) : : );
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get_real ( ticks, BDA_SEG, 0x006c );
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get_real ( midnight, BDA_SEG, 0x0070 );
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if ( midnight ) {
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midnight = 0;
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put_real ( midnight, BDA_SEG, 0x0070 );
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days += 0x1800b0;
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}
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return ( days + ticks );
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}
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#endif /* CONFIG_BIOS_CURRTICKS */
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/**************************************************************************
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CPU_NAP - Save power by halting the CPU until the next interrupt
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**************************************************************************/
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void cpu_nap ( void ) {
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__asm__ __volatile__ ( REAL_CODE ( "sti\n\t"
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"hlt\n\t"
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"cli\n\t" ) : : );
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}
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@@ -1,8 +1,7 @@
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#include <stdio.h>
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#include "realmode.h"
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#include "timer.h"
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#include "latch.h"
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#include "bios.h"
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#include <realmode.h>
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#include <bios.h>
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#include <gpxe/timer.h>
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#define K_RDWR 0x60 /* keyboard data & cmds (read/write) */
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#define K_STATUS 0x64 /* keyboard status */
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@@ -26,6 +26,9 @@
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#define ERRFILE_undionly ( ERRFILE_ARCH | ERRFILE_NET | 0x00030000 )
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#define ERRFILE_undirom ( ERRFILE_ARCH | ERRFILE_NET | 0x00040000 )
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#define ERRFILE_timer_rdtsc ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00000000 )
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#define ERRFILE_timer_bios ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00010000 )
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/** @} */
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#endif /* _BITS_ERRFILE_H */
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8
src/arch/i386/include/bits/timer2.h
Normal file
8
src/arch/i386/include/bits/timer2.h
Normal file
@@ -0,0 +1,8 @@
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#ifndef BITS_TIMER2_H
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#define BITS_TIMER2_H
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#include <stddef.h>
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void i386_timer2_udelay(unsigned int usecs);
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#endif
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@@ -1,12 +0,0 @@
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#ifndef LATCH_H
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#define LATCH_H
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#define TICKS_PER_SEC 18
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/* For different calibrators of the TSC move the declaration of
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* sleep_latch and the definitions of it's length here...
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*/
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extern unsigned long currticks ( void );
|
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#endif /* LATCH_H */
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