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[bnxt] Use updated DMA APIs

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Replace malloc_phys with dma_alloc, free_phys with dma_free, alloc_iob
with alloc_rx_iob, free_iob with free_rx_iob, virt_to_bus with dma or
iob_dma.  Replace dma_addr_t with physaddr_t.

Signed-off-by: Joseph Wong <joseph.wong@broadcom.com>
This commit is contained in:
Joseph Wong
2025-05-14 14:21:02 +01:00
committed by Michael Brown
parent 08edad7ca3
commit 1dd9ac13fd
2 changed files with 118 additions and 101 deletions
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189
src/drivers/net/bnxt/bnxt.c
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@@ -9,6 +9,7 @@ FILE_LICENCE ( GPL2_ONLY );
#include <byteswap.h>
#include <ipxe/pci.h>
#include <ipxe/iobuf.h>
#include <ipxe/dma.h>
#include <ipxe/timer.h>
#include <ipxe/malloc.h>
#include <ipxe/if_ether.h>
@@ -340,7 +341,7 @@ static inline u32 bnxt_tx_avail ( struct bnxt *bp )
return ( avail-use );
}
void bnxt_set_txq ( struct bnxt *bp, int entry, dma_addr_t mapping, int len )
void bnxt_set_txq ( struct bnxt *bp, int entry, physaddr_t mapping, int len )
{
struct tx_bd_short *prod_bd;
@@ -355,7 +356,7 @@ void bnxt_set_txq ( struct bnxt *bp, int entry, dma_addr_t mapping, int len )
else
prod_bd->flags_type = TX_BD_SHORT_FLAGS_LHINT_GTE2K;
prod_bd->flags_type |= TX_BD_FLAGS;
prod_bd->dma.addr = mapping;
prod_bd->dma = mapping;
prod_bd->len = len;
prod_bd->opaque = ( u32 )entry;
}
@@ -383,7 +384,7 @@ int bnxt_free_rx_iob ( struct bnxt *bp )
for ( i = 0; i < bp->rx.buf_cnt; i++ ) {
if ( bp->rx.iob[i] ) {
free_iob ( bp->rx.iob[i] );
free_rx_iob ( bp->rx.iob[i] );
bp->rx.iob[i] = NULL;
}
}
@@ -403,14 +404,14 @@ static void bnxt_set_rx_desc ( u8 *buf, struct io_buffer *iob,
desc->flags_type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT;
desc->len = MAX_ETHERNET_PACKET_BUFFER_SIZE;
desc->opaque = idx;
desc->dma.addr = virt_to_bus ( iob->data );
desc->dma = iob_dma ( iob );
}
static int bnxt_alloc_rx_iob ( struct bnxt *bp, u16 cons_id, u16 iob_idx )
{
struct io_buffer *iob;
iob = alloc_iob ( BNXT_RX_STD_DMA_SZ );
iob = alloc_rx_iob ( BNXT_RX_STD_DMA_SZ, bp->dma );
if ( !iob ) {
DBGP ( "- %s ( ): alloc_iob Failed\n", __func__ );
return -ENOMEM;
@@ -549,7 +550,7 @@ static int bnxt_rx_complete ( struct net_device *dev,
u8 cmpl_bit = bp->cq.completion_bit;
if ( bp->cq.cons_id == ( bp->cq.ring_cnt - 1 ) ) {
rx_cmp_hi = ( struct rx_pkt_cmpl_hi * )bp->cq.bd_virt;
rx_cmp_hi = ( struct rx_pkt_cmpl_hi * ) CQ_DMA_ADDR ( bp );
cmpl_bit ^= 0x1; /* Ring has wrapped. */
} else
rx_cmp_hi = ( struct rx_pkt_cmpl_hi * ) ( rx_cmp+1 );
@@ -567,9 +568,11 @@ void bnxt_mm_init ( struct bnxt *bp, const char *func )
memset ( bp->hwrm_addr_req, 0, REQ_BUFFER_SIZE );
memset ( bp->hwrm_addr_resp, 0, RESP_BUFFER_SIZE );
memset ( bp->hwrm_addr_dma, 0, DMA_BUFFER_SIZE );
bp->req_addr_mapping = virt_to_bus ( bp->hwrm_addr_req );
bp->resp_addr_mapping = virt_to_bus ( bp->hwrm_addr_resp );
bp->dma_addr_mapping = virt_to_bus ( bp->hwrm_addr_dma );
memset ( bp->tx.bd_virt, 0, TX_RING_BUFFER_SIZE );
memset ( bp->rx.bd_virt, 0, RX_RING_BUFFER_SIZE );
memset ( bp->cq.bd_virt, 0, CQ_RING_BUFFER_SIZE );
memset ( bp->nq.bd_virt, 0, NQ_RING_BUFFER_SIZE );
bp->link_status = STATUS_LINK_DOWN;
bp->wait_link_timeout = LINK_DEFAULT_TIMEOUT;
bp->mtu = MAX_ETHERNET_PACKET_BUFFER_SIZE;
@@ -618,40 +621,37 @@ void bnxt_free_mem ( struct bnxt *bp )
{
DBGP ( "%s\n", __func__ );
if ( bp->nq.bd_virt ) {
free_phys ( bp->nq.bd_virt, NQ_RING_BUFFER_SIZE );
dma_free ( &bp->nq_mapping, bp->nq.bd_virt, NQ_RING_BUFFER_SIZE );
bp->nq.bd_virt = NULL;
}
if ( bp->cq.bd_virt ) {
free_phys ( bp->cq.bd_virt, CQ_RING_BUFFER_SIZE );
dma_free ( &bp->cq_mapping, bp->cq.bd_virt, CQ_RING_BUFFER_SIZE );
bp->cq.bd_virt = NULL;
}
if ( bp->rx.bd_virt ) {
free_phys ( bp->rx.bd_virt, RX_RING_BUFFER_SIZE );
dma_free ( &bp->rx_mapping, bp->rx.bd_virt, RX_RING_BUFFER_SIZE );
bp->rx.bd_virt = NULL;
}
if ( bp->tx.bd_virt ) {
free_phys ( bp->tx.bd_virt, TX_RING_BUFFER_SIZE );
dma_free ( &bp->tx_mapping, bp->tx.bd_virt, TX_RING_BUFFER_SIZE );
bp->tx.bd_virt = NULL;
}
if ( bp->hwrm_addr_dma ) {
free_phys ( bp->hwrm_addr_dma, DMA_BUFFER_SIZE );
bp->dma_addr_mapping = 0;
dma_free ( &bp->dma_mapped, bp->hwrm_addr_dma, DMA_BUFFER_SIZE );
bp->hwrm_addr_dma = NULL;
}
if ( bp->hwrm_addr_resp ) {
free_phys ( bp->hwrm_addr_resp, RESP_BUFFER_SIZE );
bp->resp_addr_mapping = 0;
dma_free ( &bp->resp_mapping, bp->hwrm_addr_resp, RESP_BUFFER_SIZE );
bp->hwrm_addr_resp = NULL;
}
if ( bp->hwrm_addr_req ) {
free_phys ( bp->hwrm_addr_req, REQ_BUFFER_SIZE );
bp->req_addr_mapping = 0;
dma_free ( &bp->req_mapping, bp->hwrm_addr_req, REQ_BUFFER_SIZE );
bp->hwrm_addr_req = NULL;
}
DBGP ( "- %s ( ): - Done\n", __func__ );
@@ -660,14 +660,20 @@ void bnxt_free_mem ( struct bnxt *bp )
int bnxt_alloc_mem ( struct bnxt *bp )
{
DBGP ( "%s\n", __func__ );
bp->hwrm_addr_req = malloc_phys ( REQ_BUFFER_SIZE, BNXT_DMA_ALIGNMENT );
bp->hwrm_addr_resp = malloc_phys ( RESP_BUFFER_SIZE,
BNXT_DMA_ALIGNMENT );
bp->hwrm_addr_dma = malloc_phys ( DMA_BUFFER_SIZE, BNXT_DMA_ALIGNMENT );
bp->tx.bd_virt = malloc_phys ( TX_RING_BUFFER_SIZE, DMA_ALIGN_4K );
bp->rx.bd_virt = malloc_phys ( RX_RING_BUFFER_SIZE, DMA_ALIGN_4K );
bp->cq.bd_virt = malloc_phys ( CQ_RING_BUFFER_SIZE, BNXT_DMA_ALIGNMENT );
bp->nq.bd_virt = malloc_phys ( NQ_RING_BUFFER_SIZE, BNXT_DMA_ALIGNMENT );
bp->hwrm_addr_req = dma_alloc ( bp->dma, &bp->req_mapping,
REQ_BUFFER_SIZE, REQ_BUFFER_SIZE );
bp->hwrm_addr_resp = dma_alloc ( bp->dma, &bp->resp_mapping,
RESP_BUFFER_SIZE, RESP_BUFFER_SIZE );
bp->hwrm_addr_dma = dma_alloc ( bp->dma, &bp->dma_mapped,
DMA_BUFFER_SIZE, DMA_BUFFER_SIZE);
bp->tx.bd_virt = dma_alloc ( bp->dma, &bp->tx_mapping,
TX_RING_BUFFER_SIZE, DMA_ALIGN_4K );
bp->rx.bd_virt = dma_alloc ( bp->dma, &bp->rx_mapping,
RX_RING_BUFFER_SIZE, DMA_ALIGN_4K );
bp->cq.bd_virt = dma_alloc ( bp->dma, &bp->cq_mapping,
CQ_RING_BUFFER_SIZE, BNXT_DMA_ALIGNMENT );
bp->nq.bd_virt = dma_alloc ( bp->dma, &bp->nq_mapping,
NQ_RING_BUFFER_SIZE, BNXT_DMA_ALIGNMENT );
test_if ( bp->hwrm_addr_req &&
bp->hwrm_addr_resp &&
bp->hwrm_addr_dma &&
@@ -690,7 +696,7 @@ static void hwrm_init ( struct bnxt *bp, struct input *req, u16 cmd, u16 len )
req->req_type = cmd;
req->cmpl_ring = ( u16 )HWRM_NA_SIGNATURE;
req->target_id = ( u16 )HWRM_NA_SIGNATURE;
req->resp_addr = bp->resp_addr_mapping;
req->resp_addr = RESP_DMA_ADDR ( bp );
req->seq_id = bp->seq_id++;
}
@@ -710,10 +716,10 @@ static void short_hwrm_cmd_req ( struct bnxt *bp, u16 len )
struct hwrm_short_input sreq;
memset ( &sreq, 0, sizeof ( struct hwrm_short_input ) );
sreq.req_type = ( u16 ) ( ( struct input * )bp->hwrm_addr_req )->req_type;
sreq.req_type = ( u16 ) ( ( struct input * ) REQ_DMA_ADDR (bp ) )->req_type;
sreq.signature = SHORT_REQ_SIGNATURE_SHORT_CMD;
sreq.size = len;
sreq.req_addr = bp->req_addr_mapping;
sreq.req_addr = REQ_DMA_ADDR ( bp );
mdelay ( 100 );
dbg_short_cmd ( ( u8 * )&sreq, __func__,
sizeof ( struct hwrm_short_input ) );
@@ -722,8 +728,8 @@ static void short_hwrm_cmd_req ( struct bnxt *bp, u16 len )
static int wait_resp ( struct bnxt *bp, u32 tmo, u16 len, const char *func )
{
struct input *req = ( struct input * )bp->hwrm_addr_req;
struct output *resp = ( struct output * )bp->hwrm_addr_resp;
struct input *req = ( struct input * ) REQ_DMA_ADDR ( bp );
struct output *resp = ( struct output * ) RESP_DMA_ADDR ( bp );
u8 *ptr = ( u8 * )resp;
u32 idx;
u32 wait_cnt = HWRM_CMD_DEFAULT_MULTIPLAYER ( ( u32 )tmo );
@@ -758,8 +764,8 @@ static int bnxt_hwrm_ver_get ( struct bnxt *bp )
int rc;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_ver_get_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_ver_get_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_ver_get_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_ver_get_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_VER_GET, cmd_len );
req->hwrm_intf_maj = HWRM_VERSION_MAJOR;
req->hwrm_intf_min = HWRM_VERSION_MINOR;
@@ -809,8 +815,8 @@ static int bnxt_hwrm_func_resource_qcaps ( struct bnxt *bp )
int rc;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_func_resource_qcaps_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_func_resource_qcaps_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_func_resource_qcaps_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_func_resource_qcaps_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_RESOURCE_QCAPS,
cmd_len );
req->fid = ( u16 )HWRM_NA_SIGNATURE;
@@ -908,7 +914,7 @@ static void bnxt_hwrm_assign_resources ( struct bnxt *bp )
if ( FLAG_TEST ( bp->flags, BNXT_FLAG_RESOURCE_QCAPS_SUPPORT ) )
enables = bnxt_set_ring_info ( bp );
req = ( struct hwrm_func_cfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_cfg_input * ) REQ_DMA_ADDR ( bp );
req->num_cmpl_rings = bp->num_cmpl_rings;
req->num_tx_rings = bp->num_tx_rings;
req->num_rx_rings = bp->num_rx_rings;
@@ -928,8 +934,8 @@ static int bnxt_hwrm_func_qcaps_req ( struct bnxt *bp )
if ( bp->vf )
return STATUS_SUCCESS;
req = ( struct hwrm_func_qcaps_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_func_qcaps_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_func_qcaps_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_func_qcaps_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_QCAPS, cmd_len );
req->fid = ( u16 )HWRM_NA_SIGNATURE;
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -955,8 +961,8 @@ static int bnxt_hwrm_func_qcfg_req ( struct bnxt *bp )
int rc;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_func_qcfg_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_func_qcfg_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_func_qcfg_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_func_qcfg_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_QCFG, cmd_len );
req->fid = ( u16 )HWRM_NA_SIGNATURE;
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -997,8 +1003,8 @@ static int bnxt_hwrm_port_phy_qcaps_req ( struct bnxt *bp )
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_port_phy_qcaps_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_port_phy_qcaps_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_port_phy_qcaps_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_port_phy_qcaps_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_PORT_PHY_QCAPS, cmd_len );
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
if ( rc ) {
@@ -1018,7 +1024,7 @@ static int bnxt_hwrm_func_reset_req ( struct bnxt *bp )
struct hwrm_func_reset_input *req;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_func_reset_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_reset_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_RESET, cmd_len );
if ( !bp->vf )
req->func_reset_level = FUNC_RESET_REQ_FUNC_RESET_LEVEL_RESETME;
@@ -1035,7 +1041,7 @@ static int bnxt_hwrm_func_cfg_req ( struct bnxt *bp )
if ( bp->vf )
return STATUS_SUCCESS;
req = ( struct hwrm_func_cfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_cfg_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_CFG, cmd_len );
req->fid = ( u16 )HWRM_NA_SIGNATURE;
bnxt_hwrm_assign_resources ( bp );
@@ -1057,7 +1063,7 @@ static int bnxt_hwrm_func_drv_rgtr ( struct bnxt *bp )
int rc;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_func_drv_rgtr_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_drv_rgtr_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_DRV_RGTR, cmd_len );
/* Register with HWRM */
@@ -1089,7 +1095,7 @@ static int bnxt_hwrm_func_drv_unrgtr ( struct bnxt *bp )
if ( ! ( FLAG_TEST ( bp->flag_hwrm, VALID_DRIVER_REG ) ) )
return STATUS_SUCCESS;
req = ( struct hwrm_func_drv_unrgtr_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_drv_unrgtr_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_DRV_UNRGTR, cmd_len );
req->flags = FUNC_DRV_UNRGTR_REQ_FLAGS_PREPARE_FOR_SHUTDOWN;
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -1114,7 +1120,7 @@ static int bnxt_hwrm_set_async_event ( struct bnxt *bp )
u16 cmd_len = ( u16 )sizeof ( struct hwrm_func_vf_cfg_input );
struct hwrm_func_vf_cfg_input *req;
req = ( struct hwrm_func_vf_cfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_vf_cfg_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_VF_CFG,
cmd_len );
req->enables = VF_CFG_ENABLE_FLAGS;
@@ -1128,7 +1134,7 @@ static int bnxt_hwrm_set_async_event ( struct bnxt *bp )
u16 cmd_len = ( u16 )sizeof ( struct hwrm_func_cfg_input );
struct hwrm_func_cfg_input *req;
req = ( struct hwrm_func_cfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_cfg_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_CFG, cmd_len );
req->fid = ( u16 )HWRM_NA_SIGNATURE;
req->enables = FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR;
@@ -1148,8 +1154,8 @@ static int bnxt_hwrm_cfa_l2_filter_alloc ( struct bnxt *bp )
u32 enables;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_cfa_l2_filter_alloc_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_cfa_l2_filter_alloc_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_cfa_l2_filter_alloc_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_cfa_l2_filter_alloc_output * ) RESP_DMA_ADDR ( bp );
if ( bp->vf )
flags |= CFA_L2_FILTER_ALLOC_REQ_FLAGS_OUTERMOST;
enables = CFA_L2_FILTER_ALLOC_REQ_ENABLES_DST_ID |
@@ -1189,7 +1195,7 @@ static int bnxt_hwrm_cfa_l2_filter_free ( struct bnxt *bp )
if ( ! ( FLAG_TEST ( bp->flag_hwrm, VALID_L2_FILTER ) ) )
return STATUS_SUCCESS;
req = ( struct hwrm_cfa_l2_filter_free_input * )bp->hwrm_addr_req;
req = ( struct hwrm_cfa_l2_filter_free_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_CFA_L2_FILTER_FREE,
cmd_len );
req->l2_filter_id = bp->l2_filter_id;
@@ -1228,7 +1234,7 @@ static int bnxt_hwrm_set_rx_mask ( struct bnxt *bp, u32 rx_mask )
struct hwrm_cfa_l2_set_rx_mask_input *req;
u32 mask = set_rx_mask ( rx_mask );
req = ( struct hwrm_cfa_l2_set_rx_mask_input * )bp->hwrm_addr_req;
req = ( struct hwrm_cfa_l2_set_rx_mask_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_CFA_L2_SET_RX_MASK,
cmd_len );
req->vnic_id = bp->vnic_id;
@@ -1245,8 +1251,8 @@ static int bnxt_hwrm_port_phy_qcfg ( struct bnxt *bp, u16 idx )
int rc;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_port_phy_qcfg_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_port_phy_qcfg_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_port_phy_qcfg_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_port_phy_qcfg_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_PORT_PHY_QCFG, cmd_len );
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
if ( rc ) {
@@ -1283,9 +1289,9 @@ static int bnxt_hwrm_nvm_get_variable_req ( struct bnxt *bp,
struct hwrm_nvm_get_variable_input *req;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_nvm_get_variable_input * )bp->hwrm_addr_req;
req = ( struct hwrm_nvm_get_variable_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_NVM_GET_VARIABLE, cmd_len );
req->dest_data_addr = bp->dma_addr_mapping;
req->dest_data_addr = DMA_DMA_ADDR ( bp );
req->data_len = data_len;
req->option_num = option_num;
req->dimensions = dimensions;
@@ -1297,7 +1303,7 @@ static int bnxt_hwrm_nvm_get_variable_req ( struct bnxt *bp,
static int bnxt_get_link_speed ( struct bnxt *bp )
{
u32 *ptr32 = ( u32 * )bp->hwrm_addr_dma;
u32 *ptr32 = ( u32 * ) DMA_DMA_ADDR ( bp );
DBGP ( "%s\n", __func__ );
if ( ! ( FLAG_TEST (bp->flags, BNXT_FLAG_IS_CHIP_P7 ) ) ) {
@@ -1382,7 +1388,7 @@ static int bnxt_get_link_speed ( struct bnxt *bp )
static int bnxt_get_vlan ( struct bnxt *bp )
{
u32 *ptr32 = ( u32 * )bp->hwrm_addr_dma;
u32 *ptr32 = ( u32 * ) DMA_DMA_ADDR ( bp );
/* If VF is set to TRUE, Do not issue this command */
if ( bp->vf )
@@ -1423,7 +1429,7 @@ static int bnxt_hwrm_backing_store_qcfg ( struct bnxt *bp )
if ( ! ( FLAG_TEST ( bp->flags, BNXT_FLAG_IS_CHIP_P5_PLUS ) ) )
return STATUS_SUCCESS;
req = ( struct hwrm_func_backing_store_qcfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_backing_store_qcfg_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_BACKING_STORE_QCFG,
cmd_len );
return wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -1438,7 +1444,7 @@ static int bnxt_hwrm_backing_store_cfg ( struct bnxt *bp )
if ( ! ( FLAG_TEST ( bp->flags, BNXT_FLAG_IS_CHIP_P5_PLUS ) ) )
return STATUS_SUCCESS;
req = ( struct hwrm_func_backing_store_cfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_func_backing_store_cfg_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_FUNC_BACKING_STORE_CFG,
cmd_len );
req->flags = FUNC_BACKING_STORE_CFG_REQ_FLAGS_PREBOOT_MODE;
@@ -1457,8 +1463,8 @@ static int bnxt_hwrm_queue_qportcfg ( struct bnxt *bp )
if ( ! ( FLAG_TEST ( bp->flags, BNXT_FLAG_IS_CHIP_P5_PLUS ) ) )
return STATUS_SUCCESS;
req = ( struct hwrm_queue_qportcfg_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_queue_qportcfg_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_queue_qportcfg_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_queue_qportcfg_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_QUEUE_QPORTCFG, cmd_len );
req->flags = 0;
req->port_id = 0;
@@ -1481,7 +1487,7 @@ static int bnxt_hwrm_port_mac_cfg ( struct bnxt *bp )
if ( bp->vf )
return STATUS_SUCCESS;
req = ( struct hwrm_port_mac_cfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_port_mac_cfg_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_PORT_MAC_CFG, cmd_len );
req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
return wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -1503,7 +1509,7 @@ static int bnxt_hwrm_port_phy_cfg ( struct bnxt *bp )
u8 auto_duplex = 0;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_port_phy_cfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_port_phy_cfg_input * ) REQ_DMA_ADDR ( bp );
flags = PORT_PHY_CFG_REQ_FLAGS_FORCE |
PORT_PHY_CFG_REQ_FLAGS_RESET_PHY;
@@ -1702,8 +1708,8 @@ static int bnxt_hwrm_stat_ctx_alloc ( struct bnxt *bp )
int rc;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_stat_ctx_alloc_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_stat_ctx_alloc_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_stat_ctx_alloc_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_stat_ctx_alloc_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_STAT_CTX_ALLOC, cmd_len );
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
if ( rc ) {
@@ -1726,7 +1732,7 @@ static int bnxt_hwrm_stat_ctx_free ( struct bnxt *bp )
if ( ! ( FLAG_TEST ( bp->flag_hwrm, VALID_STAT_CTX ) ) )
return STATUS_SUCCESS;
req = ( struct hwrm_stat_ctx_free_input * )bp->hwrm_addr_req;
req = ( struct hwrm_stat_ctx_free_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_STAT_CTX_FREE, cmd_len );
req->stat_ctx_id = ( u32 )bp->stat_ctx_id;
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -1749,7 +1755,7 @@ static int bnxt_hwrm_ring_free_grp ( struct bnxt *bp )
if ( ! ( FLAG_TEST ( bp->flag_hwrm, VALID_RING_GRP ) ) )
return STATUS_SUCCESS;
req = ( struct hwrm_ring_grp_free_input * )bp->hwrm_addr_req;
req = ( struct hwrm_ring_grp_free_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_RING_GRP_FREE, cmd_len );
req->ring_group_id = ( u32 )bp->ring_grp_id;
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -1773,8 +1779,8 @@ static int bnxt_hwrm_ring_alloc_grp ( struct bnxt *bp )
if ( FLAG_TEST ( bp->flags, BNXT_FLAG_IS_CHIP_P5_PLUS ) )
return STATUS_SUCCESS;
req = ( struct hwrm_ring_grp_alloc_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_ring_grp_alloc_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_ring_grp_alloc_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_ring_grp_alloc_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_RING_GRP_ALLOC, cmd_len );
req->cr = bp->cq_ring_id;
req->rr = bp->rx_ring_id;
@@ -1799,7 +1805,7 @@ int bnxt_hwrm_ring_free ( struct bnxt *bp, u16 ring_id, u8 ring_type )
struct hwrm_ring_free_input *req;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_ring_free_input * )bp->hwrm_addr_req;
req = ( struct hwrm_ring_free_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_RING_FREE, cmd_len );
req->ring_type = ring_type;
req->ring_id = ring_id;
@@ -1814,8 +1820,8 @@ static int bnxt_hwrm_ring_alloc ( struct bnxt *bp, u8 type )
int rc;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_ring_alloc_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_ring_alloc_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_ring_alloc_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_ring_alloc_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_RING_ALLOC, cmd_len );
req->ring_type = type;
switch ( type ) {
@@ -1824,13 +1830,13 @@ static int bnxt_hwrm_ring_alloc ( struct bnxt *bp, u8 type )
req->int_mode = BNXT_CQ_INTR_MODE ( ( (FLAG_TEST ( bp->flags, BNXT_FLAG_IS_CHIP_P7) ) || bp->vf ) );
req->length = ( u32 )bp->nq.ring_cnt;
req->logical_id = 0xFFFF; // Required value for Thor FW?
req->page_tbl_addr = virt_to_bus ( bp->nq.bd_virt );
req->page_tbl_addr = NQ_DMA_ADDR ( bp );
break;
case RING_ALLOC_REQ_RING_TYPE_L2_CMPL:
req->page_size = LM_PAGE_BITS ( 8 );
req->int_mode = BNXT_CQ_INTR_MODE ( bp->vf );
req->length = ( u32 )bp->cq.ring_cnt;
req->page_tbl_addr = virt_to_bus ( bp->cq.bd_virt );
req->page_tbl_addr = CQ_DMA_ADDR ( bp );
if ( ! ( FLAG_TEST ( bp->flags, BNXT_FLAG_IS_CHIP_P5_PLUS ) ) )
break;
req->enables = RING_ALLOC_REQ_ENABLES_NQ_RING_ID_VALID;
@@ -1844,7 +1850,7 @@ static int bnxt_hwrm_ring_alloc ( struct bnxt *bp, u8 type )
req->queue_id = ( u16 )bp->queue_id;
req->stat_ctx_id = ( u32 )bp->stat_ctx_id;
req->cmpl_ring_id = bp->cq_ring_id;
req->page_tbl_addr = virt_to_bus ( bp->tx.bd_virt );
req->page_tbl_addr = TX_DMA_ADDR ( bp );
break;
case RING_ALLOC_REQ_RING_TYPE_RX:
req->page_size = LM_PAGE_BITS ( 8 );
@@ -1852,7 +1858,7 @@ static int bnxt_hwrm_ring_alloc ( struct bnxt *bp, u8 type )
req->length = ( u32 )bp->rx.ring_cnt;
req->stat_ctx_id = ( u32 )STAT_CTX_ID;
req->cmpl_ring_id = bp->cq_ring_id;
req->page_tbl_addr = virt_to_bus ( bp->rx.bd_virt );
req->page_tbl_addr = RX_DMA_ADDR ( bp );
if ( ! ( FLAG_TEST ( bp->flags, BNXT_FLAG_IS_CHIP_P5_PLUS ) ) )
break;
req->queue_id = ( u16 )RX_RING_QID;
@@ -1980,8 +1986,8 @@ static int bnxt_hwrm_vnic_alloc ( struct bnxt *bp )
int rc;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_vnic_alloc_input * )bp->hwrm_addr_req;
resp = ( struct hwrm_vnic_alloc_output * )bp->hwrm_addr_resp;
req = ( struct hwrm_vnic_alloc_input * ) REQ_DMA_ADDR ( bp );
resp = ( struct hwrm_vnic_alloc_output * ) RESP_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_VNIC_ALLOC, cmd_len );
req->flags = VNIC_ALLOC_REQ_FLAGS_DEFAULT;
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -2005,7 +2011,7 @@ static int bnxt_hwrm_vnic_free ( struct bnxt *bp )
if ( ! ( FLAG_TEST ( bp->flag_hwrm, VALID_VNIC_ID ) ) )
return STATUS_SUCCESS;
req = ( struct hwrm_vnic_free_input * )bp->hwrm_addr_req;
req = ( struct hwrm_vnic_free_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_VNIC_FREE, cmd_len );
req->vnic_id = bp->vnic_id;
rc = wait_resp ( bp, bp->hwrm_cmd_timeout, cmd_len, __func__ );
@@ -2024,7 +2030,7 @@ static int bnxt_hwrm_vnic_cfg ( struct bnxt *bp )
struct hwrm_vnic_cfg_input *req;
DBGP ( "%s\n", __func__ );
req = ( struct hwrm_vnic_cfg_input * )bp->hwrm_addr_req;
req = ( struct hwrm_vnic_cfg_input * ) REQ_DMA_ADDR ( bp );
hwrm_init ( bp, ( void * )req, ( u16 )HWRM_VNIC_CFG, cmd_len );
req->enables = VNIC_CFG_REQ_ENABLES_MRU;
req->mru = bp->mtu;
@@ -2117,8 +2123,8 @@ int bnxt_hwrm_run ( hwrm_func_t cmds[], struct bnxt *bp )
int ret;
for ( ptr = cmds; *ptr; ++ptr ) {
memset ( bp->hwrm_addr_req, 0, REQ_BUFFER_SIZE );
memset ( bp->hwrm_addr_resp, 0, RESP_BUFFER_SIZE );
memset ( ( void * ) REQ_DMA_ADDR ( bp ), 0, REQ_BUFFER_SIZE );
memset ( ( void * ) RESP_DMA_ADDR ( bp ), 0, RESP_BUFFER_SIZE );
ret = ( *ptr ) ( bp );
if ( ret ) {
DBGP ( "- %s ( ): Failed\n", __func__ );
@@ -2162,16 +2168,16 @@ static int bnxt_tx ( struct net_device *dev, struct io_buffer *iob )
{
struct bnxt *bp = dev->priv;
u16 len, entry;
dma_addr_t mapping;
physaddr_t mapping;
if ( bnxt_tx_avail ( bp ) < 1 ) {
DBGP ( "- %s ( ): Failed no bd's available\n", __func__ );
return -ENOBUFS;
}
mapping = iob_dma ( iob );
bnxt_tx_adjust_pkt ( bp, iob );
entry = bp->tx.prod_id;
mapping = virt_to_bus ( iob->data );
len = iob_len ( iob );
bp->tx.iob[entry] = iob;
bnxt_set_txq ( bp, entry, mapping, len );
@@ -2229,7 +2235,7 @@ static void bnxt_service_cq ( struct net_device *dev )
u32 cq_type;
while ( done == SERVICE_NEXT_CQ_BD ) {
cmp = ( struct cmpl_base * )BD_NOW ( bp->cq.bd_virt,
cmp = ( struct cmpl_base * )BD_NOW ( CQ_DMA_ADDR ( bp ),
bp->cq.cons_id,
sizeof ( struct cmpl_base ) );
@@ -2280,8 +2286,9 @@ static void bnxt_service_nq ( struct net_device *dev )
return;
while ( done == SERVICE_NEXT_NQ_BD ) {
nqp = ( struct nq_base * )BD_NOW ( bp->nq.bd_virt,
bp->nq.cons_id, sizeof ( struct nq_base ) );
nqp = ( struct nq_base * )BD_NOW ( NQ_DMA_ADDR ( bp ),
bp->nq.cons_id,
sizeof ( struct nq_base ) );
if ( ( nqp->v & NQ_CN_V ) ^ bp->nq.completion_bit )
break;
nq_type = ( nqp->type & NQ_CN_TYPE_MASK );
@@ -2368,6 +2375,10 @@ static int bnxt_init_one ( struct pci_device *pci )
bp->dev = netdev;
netdev->dev = &pci->dev;
/* Configure DMA */
bp->dma = &pci->dma;
netdev->dma = bp->dma;
/* Enable PCI device */
adjust_pci_device ( pci );

30
src/drivers/net/bnxt/bnxt.h
View File

@@ -25,13 +25,6 @@
#define __be32 u32
#define __be64 u64
#define dma_addr_t unsigned long
union dma_addr64_t {
dma_addr_t addr;
u64 as_u64;
};
#include "bnxt_hsi.h"
#define DRV_MODULE_NAME "bnxt"
@@ -182,6 +175,13 @@ union dma_addr64_t {
#define STAT_CTX_ID ((bp->vf || FLAG_TEST(bp->flags, BNXT_FLAG_IS_CHIP_P5_PLUS)) ? bp->stat_ctx_id : 0)
#define TX_AVAIL(r) (r - 1)
#define TX_IN_USE(a, b, c) ((a - b) & (c - 1))
#define NQ_DMA_ADDR(bp) ( dma ( &bp->nq_mapping, bp->nq.bd_virt ) )
#define CQ_DMA_ADDR(bp) ( dma ( &bp->cq_mapping, bp->cq.bd_virt ) )
#define TX_DMA_ADDR(bp) ( dma ( &bp->tx_mapping, bp->tx.bd_virt ) )
#define RX_DMA_ADDR(bp) ( dma ( &bp->rx_mapping, bp->rx.bd_virt ) )
#define REQ_DMA_ADDR(bp) ( dma ( &bp->req_mapping, bp->hwrm_addr_req ) )
#define RESP_DMA_ADDR(bp) ( dma ( &bp->resp_mapping, bp->hwrm_addr_resp ) )
#define DMA_DMA_ADDR(bp) ( dma ( &bp->dma_mapped, bp->hwrm_addr_dma ) )
#define NO_MORE_NQ_BD_TO_SERVICE 1
#define SERVICE_NEXT_NQ_BD 0
#define NO_MORE_CQ_BD_TO_SERVICE 1
@@ -472,7 +472,7 @@ struct tx_bd_short {
#define TX_BD_SHORT_FLAGS_COAL_NOW 0x8000UL
u16 len;
u32 opaque;
union dma_addr64_t dma;
physaddr_t dma;
};
struct tx_cmpl {
@@ -879,7 +879,7 @@ struct rx_prod_pkt_bd {
#define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
u16 len;
u32 opaque;
union dma_addr64_t dma;
physaddr_t dma;
};
struct rx_info {
@@ -933,9 +933,15 @@ struct bnxt {
void *hwrm_addr_req;
void *hwrm_addr_resp;
void *hwrm_addr_dma;
dma_addr_t req_addr_mapping;
dma_addr_t resp_addr_mapping;
dma_addr_t dma_addr_mapping;
struct dma_device *dma;
struct dma_mapping req_mapping;
struct dma_mapping resp_mapping;
struct dma_mapping dma_mapped;
struct dma_mapping tx_mapping;
struct dma_mapping rx_mapping;
struct dma_mapping cq_mapping;
struct dma_mapping nq_mapping;
struct tx_info tx; /* Tx info. */
struct rx_info rx; /* Rx info. */
struct cmp_info cq; /* completion info. */