Restructured PCI subsystem to fit the new device model.

Generic PCI code now handles 64-bit BARs correctly when setting
"membase"; drivers should need to call pci_bar_start() only if they want
to use BARs other than the first memory or I/O BAR.

Split rarely-used PCI functions out into pciextra.c.

Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4).
284 bytes of this saving comes from the pci/pciextra split.

Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to
match the names used in Linux).
This commit is contained in:
Michael Brown
2006-05-16 15:12:06 +00:00
parent fcdab6299c
commit 15ee09ed10
35 changed files with 552 additions and 542 deletions

View File

@@ -966,7 +966,7 @@ rhine_probe ( struct nic *nic, struct pci_device *pci ) {
if (!pci->ioaddr)
return 0;
rhine_probe1 (nic, pci, pci->ioaddr, pci->device_id, -1);
rhine_probe1 (nic, pci, pci->ioaddr, pci->device, -1);
adjust_pci_device ( pci );
rhine_reset (nic);
@@ -1412,7 +1412,7 @@ static struct nic_operations rhine_operations = {
};
static struct pci_id rhine_nics[] = {
static struct pci_device_id rhine_nics[] = {
PCI_ROM(0x1106, 0x3065, "dlink-530tx", "VIA 6102"),
PCI_ROM(0x1106, 0x3106, "via-rhine-6105", "VIA 6105"),
PCI_ROM(0x1106, 0x3043, "dlink-530tx-old", "VIA 3043"), /* Rhine-I 86c100a */