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Restructured PCI subsystem to fit the new device model.
Generic PCI code now handles 64-bit BARs correctly when setting "membase"; drivers should need to call pci_bar_start() only if they want to use BARs other than the first memory or I/O BAR. Split rarely-used PCI functions out into pciextra.c. Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4). 284 bytes of this saving comes from the pci/pciextra split. Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to match the names used in Linux).
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@@ -966,7 +966,7 @@ rhine_probe ( struct nic *nic, struct pci_device *pci ) {
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if (!pci->ioaddr)
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return 0;
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rhine_probe1 (nic, pci, pci->ioaddr, pci->device_id, -1);
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rhine_probe1 (nic, pci, pci->ioaddr, pci->device, -1);
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adjust_pci_device ( pci );
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rhine_reset (nic);
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@@ -1412,7 +1412,7 @@ static struct nic_operations rhine_operations = {
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};
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static struct pci_id rhine_nics[] = {
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static struct pci_device_id rhine_nics[] = {
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PCI_ROM(0x1106, 0x3065, "dlink-530tx", "VIA 6102"),
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PCI_ROM(0x1106, 0x3106, "via-rhine-6105", "VIA 6105"),
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PCI_ROM(0x1106, 0x3043, "dlink-530tx-old", "VIA 3043"), /* Rhine-I 86c100a */
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