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Restructured PCI subsystem to fit the new device model.
Generic PCI code now handles 64-bit BARs correctly when setting "membase"; drivers should need to call pci_bar_start() only if they want to use BARs other than the first memory or I/O BAR. Split rarely-used PCI functions out into pciextra.c. Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4). 284 bytes of this saving comes from the pci/pciextra split. Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to match the names used in Linux).
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@@ -528,7 +528,7 @@ static struct nic_operations rtl_operations = {
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};
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static struct pci_id rtl8139_nics[] = {
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static struct pci_device_id rtl8139_nics[] = {
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PCI_ROM(0x10ec, 0x8129, "rtl8129", "Realtek 8129"),
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PCI_ROM(0x10ec, 0x8139, "rtl8139", "Realtek 8139"),
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PCI_ROM(0x10ec, 0x8138, "rtl8139b", "Realtek 8139B"),
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