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Restructured PCI subsystem to fit the new device model.

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Generic PCI code now handles 64-bit BARs correctly when setting
"membase"; drivers should need to call pci_bar_start() only if they want
to use BARs other than the first memory or I/O BAR.

Split rarely-used PCI functions out into pciextra.c.

Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4).
284 bytes of this saving comes from the pci/pciextra split.

Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to
match the names used in Linux).
This commit is contained in:
Michael Brown
2006-05-16 15:12:06 +00:00
parent fcdab6299c
commit 15ee09ed10
35 changed files with 552 additions and 542 deletions
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2
src/drivers/net/prism2_pci.c
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@@ -39,7 +39,7 @@ static void prism2_pci_disable ( struct nic *nic,
prism2_disable ( nic );
}
static struct pci_id prism2_pci_nics[] = {
static struct pci_device_id prism2_pci_nics[] = {
PCI_ROM(0x1260, 0x3873, "prism2_pci", "Harris Semiconductor Prism2.5 clone"),
PCI_ROM(0x1260, 0x3873, "hwp01170", "ActionTec HWP01170"),
PCI_ROM(0x1260, 0x3873, "dwl520", "DLink DWL-520"),