Restructured PCI subsystem to fit the new device model.

Generic PCI code now handles 64-bit BARs correctly when setting
"membase"; drivers should need to call pci_bar_start() only if they want
to use BARs other than the first memory or I/O BAR.

Split rarely-used PCI functions out into pciextra.c.

Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4).
284 bytes of this saving comes from the pci/pciextra split.

Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to
match the names used in Linux).
This commit is contained in:
Michael Brown
2006-05-16 15:12:06 +00:00
parent fcdab6299c
commit 15ee09ed10
35 changed files with 552 additions and 542 deletions

View File

@@ -800,7 +800,7 @@ static struct nic_operations ns83820_operations = {
};
static struct pci_id ns83820_nics[] = {
static struct pci_device_id ns83820_nics[] = {
PCI_ROM(0x100b, 0x0022, "ns83820", "National Semiconductor 83820"),
};
@@ -822,7 +822,7 @@ static int ns83820_probe ( struct nic *nic, struct pci_device *pci ) {
return 0;
printf("ns83820.c: Found %s, vendor=0x%hX, device=0x%hX\n",
pci->name, pci->vendor_id, pci->device_id);
pci->name, pci->vendor, pci->device);
/* point to private storage */
ns = &nsx;