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Restructured PCI subsystem to fit the new device model.

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Generic PCI code now handles 64-bit BARs correctly when setting
"membase"; drivers should need to call pci_bar_start() only if they want
to use BARs other than the first memory or I/O BAR.

Split rarely-used PCI functions out into pciextra.c.

Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4).
284 bytes of this saving comes from the pci/pciextra split.

Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to
match the names used in Linux).
This commit is contained in:
Michael Brown
2006-05-16 15:12:06 +00:00
parent fcdab6299c
commit 15ee09ed10
35 changed files with 552 additions and 542 deletions
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2
src/drivers/net/e1000.c
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@@ -3707,7 +3707,7 @@ static struct nic_operations e1000_operations = {
};
static struct pci_id e1000_nics[] = {
static struct pci_device_id e1000_nics[] = {
PCI_ROM(0x8086, 0x1000, "e1000-82542", "Intel EtherExpressPro1000"),
PCI_ROM(0x8086, 0x1001, "e1000-82543gc-fiber", "Intel EtherExpressPro1000 82543GC Fiber"),
PCI_ROM(0x8086, 0x1004, "e1000-82543gc-copper", "Intel EtherExpressPro1000 82543GC Copper"),