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Restructured PCI subsystem to fit the new device model.
Generic PCI code now handles 64-bit BARs correctly when setting "membase"; drivers should need to call pci_bar_start() only if they want to use BARs other than the first memory or I/O BAR. Split rarely-used PCI functions out into pciextra.c. Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4). 284 bytes of this saving comes from the pci/pciextra split. Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to match the names used in Linux).
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@@ -457,7 +457,7 @@ static int dmfe_probe ( struct nic *nic, struct pci_device *pci ) {
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BASE = pci->ioaddr;
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printf("dmfe.c: Found %s Vendor=0x%hX Device=0x%hX\n",
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pci->name, pci->vendor_id, pci->device_id);
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pci->name, pci->vendor, pci->device);
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/* Read Chip revision */
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pci_read_config_dword(pci, PCI_REVISION_ID, &dev_rev);
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@@ -466,7 +466,7 @@ static int dmfe_probe ( struct nic *nic, struct pci_device *pci ) {
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/* point to private storage */
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db = &dfx;
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db->chip_id = ((u32) pci->device_id << 16) | pci->vendor_id;
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db->chip_id = ((u32) pci->device << 16) | pci->vendor;
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BASE = pci_bar_start(pci, PCI_BASE_ADDRESS_0);
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db->chip_revision = dev_rev;
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@@ -1205,7 +1205,7 @@ static struct nic_operations dmfe_operations = {
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};
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static struct pci_id dmfe_nics[] = {
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static struct pci_device_id dmfe_nics[] = {
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PCI_ROM(0x1282, 0x9100, "dmfe9100", "Davicom 9100"),
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PCI_ROM(0x1282, 0x9102, "dmfe9102", "Davicom 9102"),
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PCI_ROM(0x1282, 0x9009, "dmfe9009", "Davicom 9009"),
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