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Restructured PCI subsystem to fit the new device model.

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Generic PCI code now handles 64-bit BARs correctly when setting
"membase"; drivers should need to call pci_bar_start() only if they want
to use BARs other than the first memory or I/O BAR.

Split rarely-used PCI functions out into pciextra.c.

Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4).
284 bytes of this saving comes from the pci/pciextra split.

Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to
match the names used in Linux).
This commit is contained in:
Michael Brown
2006-05-16 15:12:06 +00:00
parent fcdab6299c
commit 15ee09ed10
35 changed files with 552 additions and 542 deletions
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4
src/drivers/net/3c90x.c
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@@ -719,7 +719,7 @@ static int a3c90x_probe ( struct nic *nic, struct pci_device *pci ) {
nic->ioaddr = pci->ioaddr;
nic->irqno = 0;
INF_3C90X.is3c556 = (pci->device_id == 0x6055);
INF_3C90X.is3c556 = (pci->device == 0x6055);
INF_3C90X.IOAddr = pci->ioaddr & ~3;
INF_3C90X.CurrentWindow = 255;
switch (a3c90x_internal_ReadEeprom(INF_3C90X.IOAddr, 0x03))
@@ -984,7 +984,7 @@ static struct nic_operations a3c90x_operations = {
};
static struct pci_id a3c90x_nics[] = {
static struct pci_device_id a3c90x_nics[] = {
/* Original 90x revisions: */
PCI_ROM(0x10b7, 0x6055, "3c556", "3C556"), /* Huricane */
PCI_ROM(0x10b7, 0x9000, "3c905-tpo", "3Com900-TPO"), /* 10 Base TPO */