Restructured PCI subsystem to fit the new device model.

Generic PCI code now handles 64-bit BARs correctly when setting
"membase"; drivers should need to call pci_bar_start() only if they want
to use BARs other than the first memory or I/O BAR.

Split rarely-used PCI functions out into pciextra.c.

Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4).
284 bytes of this saving comes from the pci/pciextra split.

Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to
match the names used in Linux).
This commit is contained in:
Michael Brown
2006-05-16 15:12:06 +00:00
parent fcdab6299c
commit 15ee09ed10
35 changed files with 552 additions and 542 deletions

View File

@@ -1,28 +0,0 @@
#include "dev.h"
#include <gpxe/pci.h>
#include "registers.h"
/*
* Register a device as the default PCI boot device. This code is
* called by the PCI ROM prefix.
*
* Do not move this code to drivers/bus/pci.c, because it is
* i386-specific, and don't merge it with select_isapnp.c, because
* that would cause linker symbol pollution.
*
*/
void i386_select_pci_device ( struct i386_all_regs *ix86 ) {
/*
* PCI BIOS passes busdevfn in %ax
*
*/
union {
struct bus_loc bus_loc;
struct pci_loc pci_loc;
} u;
/* Select PCI bus and specified busdevfn as first boot device */
memset ( &u, 0, sizeof ( u ) );
u.pci_loc.busdevfn = ix86->regs.ax;
select_device ( &dev, &pci_driver, &u.bus_loc );
}